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/Documentation/livepatch/
Dmodule-elf-format.rst21 loader to perform the all the arch-specific relocation work. Specifically,
30 table, symbol table, and relocation section indices, ELF information is
32 relocation sections and symbols, which are described in this document. The
33 ELF constants used to mark livepatch symbols and relocation sections were
51 relocation sections in place of dynrela sections, and the symbols that the
53 arch-specific livepatch relocation code is replaced by a call to
80 3. Livepatch relocation sections
83 A livepatch module manages its own ELF relocation sections to apply
87 relocation section(s) to the driver once it loads.
90 multiple livepatch relocation sections associated with it (e.g. patches to
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Dlivepatch.rst238 relocation section in the generated livepatch module, see
/Documentation/bpf/
Dllvm_reloc.rst7 This document describes LLVM BPF backend relocation types.
9 Relocation Record
12 LLVM BPF backend records each relocation with the following 16-byte
18 Elf64_Xword r_info; // Relocation type and symbol index.
55 Relocation section '.rel.text' at offset 0x190 contains 4 entries:
62 Each relocation is represented by ``Offset`` (8 bytes) and ``Info`` (8 bytes).
63 For example, the first relocation corresponds to the first instruction
64 (Offset 0x0) and the corresponding ``Info`` indicates the relocation type
81 Similarly, the second relocation is at ``.text`` offset ``0x18``, instruction 3,
83 The second relocation resolves to global variable ``g2`` which has a symbol
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/Documentation/devicetree/bindings/remoteproc/
Dqcom,pil-info.yaml7 title: Qualcomm peripheral image loader relocation info
13 The Qualcomm peripheral image loader relocation memory region, in IMEM, is
14 used for communicating remoteproc relocation information to post mortem
/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dhip04-bootwrapper.yaml25 [2]: relocation physical address
26 [3]: relocation size
/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-mc.yaml21 Tegra20 Memory Controller includes the GART (Graphics Address Relocation
/Documentation/devicetree/bindings/sram/
Dqcom,imem.yaml54 description: Peripheral image loader relocation region
/Documentation/core-api/
Dthis_cpu_ops.rst70 the processor. So the relocation to the per cpu base is encoded in the
254 address relocation and a Read-Modify-Write operation in the same
266 relocation. IMHO the second form looks cleaner and has an easier time
Dlocal_ops.rst22 relocation with the ``local_t`` like semantics in a single instruction and
/Documentation/arch/arm/
Dmemory.rst35 CPU supports vector relocation (control
/Documentation/gpu/
Dvgaarbiter.rst6 modern devices allow relocation of such ranges, some "Legacy" VGA devices
Ddrm-mm.rst339 others (a fairly expensive operation), and providing relocation support
Di915.rst342 This process is dubbed relocation.
/Documentation/bpf/libbpf/
Dlibbpf_overview.rst162 recorded BTF type and relocation information and matching them to BTF
/Documentation/kbuild/
Dmakefiles.rst1491 For example, powerpc uses this to check relocation sanity of
/Documentation/filesystems/xfs/
Dxfs-online-fsck-design.rst5443 After each relocation, clearspace calls the "map free space" function again to