Searched +full:a +full:- +full:child +full:- +full:node +full:- +full:property (Results 1 – 25 of 139) sorted by relevance
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| /Documentation/devicetree/bindings/ |
| D | example-schema.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 # All the top-level keys are standard json-schema keywords except for
8 # $id is a unique identifier based on the filename. There may or may not be a
10 $id: http://devicetree.org/schemas/example-schema.yaml#
11 # $schema is the meta-schema this schema should be validated with.
12 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Rob Herring <robh@kernel.org>
20 A more detailed multi-line description of the binding.
26 begin with a tab character.
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| D | writing-bindings.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 This is a list of common review feedback items focused on binding design. With
11 Documentation/devicetree/bindings/submitting-patches.rst
17 - DO attempt to make bindings complete even if a driver doesn't support some
18 features. For example, if a device has an interrupt, then include the
19 'interrupts' property even if the driver is only polled mode.
21 - DON'T refer to Linux or "device driver" in bindings. Bindings should be
24 - DO use node names matching the class of the device. Many standard names are
27 - DO check that the example matches the documentation especially after making
30 - DON'T create nodes just for the sake of instantiating drivers. Multi-function
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| D | dts-coding-style.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 ---------------------------
18 The Devicetree Specification allows a broad range of characters in node
19 and property names, but this coding style narrows the range down to achieve
22 1. Node and property names can use only the following characters:
24 * Lowercase characters: [a-z]
25 * Digits: [0-9]
26 * Dash: -
30 * Lowercase characters: [a-z]
31 * Digits: [0-9]
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec6.txt | 4 -SEC 6 Node
5 -Job Ring Node
6 -Full Example
9 SEC 6 Node
13 Node defines the base address of the SEC 6 block.
16 For example, In C293, we could see three SEC 6 node.
20 - compatible
23 Definition: Must include "fsl,sec-v6.0".
25 - fsl,sec-era
28 Definition: A standard property. Define the 'ERA' of the SEC
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | raideng.txt | 3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
4 Engine should have a separate node.
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
17 between child address space and parent address space
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
30 There must be a sub-node for each job queue present in RAID Engine
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| D | pamu.txt | 5 The PAMU is an I/O MMU that provides device-to-memory access control and
10 - compatible : <string>
11 First entry is a version-specific string, such as
12 "fsl,pamu-v1.0". The second is "fsl,pamu".
13 - ranges : <prop-encoded-array>
14 A standard property. Utilized to describe the memory mapped
20 - interrupts : <prop-encoded-array>
25 - #address-cells: <u32>
26 A standard property.
27 - #size-cells : <u32>
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| D | srio.txt | 3 RapidIO port node:
5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
18 Definition: A standard property. Specifies the physical address and
22 - interrupts
24 Value type: <prop_encoded-array>
26 value of the interrupts property consists of one interrupt
28 binding document describing the node's interrupt parent.
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| D | mpc5200.txt | 2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
15 The split between the MPC5200 and the MPC5200B leaves a bit of a
16 conundrum. How should the compatible property be set up to provide
21 "fsl,mpc5200-<device>".
24 silicon bugs and it adds a small number of enhancements. Most of the
25 devices either provide exactly the same interface as on the 5200. A few
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | samsung,pinctrl-pins-cfg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-pins-cfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
21 manual and these values are programmed as-is into the pin pull up/down and
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| /Documentation/devicetree/bindings/media/xilinx/ |
| D | video.txt | 2 -------------------------------------
6 creating a video pipeline.
8 Each video IP core is represented by an AMBA bus child node in the device
10 cores are represented as defined in ../video-interfaces.txt.
12 The whole pipeline is represented by an AMBA bus child node in the device
16 -----------------
20 - xlnx,video-format: This property represents a video format transmitted on an
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
25 - xlnx,video-width: This property qualifies the video format with the sample
26 width expressed as a number of bits per pixel component. All components must
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-miphy365x.txt | 4 This binding describes a miphy device that is used to control PHY hardware
7 Required properties (controller (parent) node):
8 - compatible : Should be "st,miphy365x-phy"
9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
11 an entry for each port sub-node, specifying the control
14 Required nodes : A sub-node is required for each channel the controller
16 'reg' and 'reg-names' properties are used inside these
20 Required properties (port (child) node):
21 - #phy-cells : Should be 1 (See second example)
23 - PHY_TYPE_SATA
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| /Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
24 - #dma-cells: Should be <1>, see "dmas" property below
25 - reg: Should contain VDMA registers location and length.
26 - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
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| /Documentation/devicetree/bindings/soc/samsung/ |
| D | exynos-usi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
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| /Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 2 ---------------------------
5 format: <vendor>,<chip>-<device>.
7 name in their compatible property because they first appeared in this
11 -------------
14 #address-cells = <1>;
15 #size-cells = <0>;
30 A "cpu" node describes one logical processor (hardware thread).
34 - device_type
37 - reg
41 The SoC node
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| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
14 processors using a queued mailbox interrupt mechanism. The IP block is
16 interconnect bus. The communication is achieved through a set of registers
19 Each mailbox IP block/cluster has a certain number of h/w fifo queues and
21 controller within a processor subsystem, and there can be more than one line
22 going to a specific processor's interrupt controller. The interrupt line
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| /Documentation/devicetree/bindings/hwmon/ |
| D | ti,ina3221.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean Delvare <jdelvare@suse.com>
11 - Guenter Roeck <linux@roeck-us.net>
20 ti,single-shot:
22 This chip has two power modes: single-shot (chip takes one measurement
25 hardware monitor type device, but the single-shot mode is more power-
26 friendly and useful for battery-powered device which cares power
29 If this property is present, the single-shot mode will be used, instead
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
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| /Documentation/devicetree/bindings/media/ |
| D | stih407-c8sectpfe.txt | 13 Required properties (controller (parent) node):
14 - compatible : Should be "stih407-c8sectpfe"
16 - reg : Address and length of register sets for each device in
17 "reg-names"
19 - reg-names : The names of the register addresses corresponding to the
21 - c8sectpfe: c8sectpfe registers
22 - c8sectpfe-ram: c8sectpfe internal sram
24 - clocks : phandle list of c8sectpfe clocks
25 - clock-names : should be "c8sectpfe"
26 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
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| /Documentation/devicetree/bindings/input/ |
| D | input-reset.txt | 3 A simple binding to represent a set of keys as described in
4 include/uapi/linux/input.h. This is to communicate a sequence of keys to the
5 sysrq driver. Upon holding the keys for a specified amount of time (if
8 Key sequences are global to the system but all the keys in a set must be coming
11 The /chosen node should contain a 'linux,sysrq-reset-seq' child node to define
12 a set of keys.
14 Required property:
17 Optional property:
18 timeout-ms: duration keys must be pressed together in milliseconds before
19 generating a sysrq. If omitted the system is rebooted immediately when a valid
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| /Documentation/devicetree/bindings/powerpc/ |
| D | ibm,powerpc-cpu-features.txt | 3 (skiboot/doc/device-tree/ibm,powerpc-cpu-features/binding.txt)
9 ibm,powerpc-cpu-features binding
19 /cpus/ibm,powerpc-cpu-features node binding
20 -------------------------------------------
22 Node: ibm,powerpc-cpu-features
26 The node name must be "ibm,powerpc-cpu-features".
28 It is implemented as a child of the node "/cpus", but this must not be
31 The node is optional but should be provided by new OPAL firmware.
35 - compatible
38 Definition: "ibm,powerpc-cpu-features"
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
15 +-----+ +-----+
17 +------------+ +-----+ +-----+
19 | | /--------+--------+
20 | +------+ | +------+ child bus A, on GPIO value set to 0
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| D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a single register
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
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| /Documentation/devicetree/bindings/power/reset/ |
| D | syscon-reboot.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 This is a generic reset driver using syscon to map the reset register.
14 The reset is generally performed with a write to the reset register
16 mask defined in the reboot node. Default will be little endian mode, 32 bit
18 parental dt-node. So the SYSCON reboot node should be represented as a
19 sub-node of a "syscon", "simple-mfd" node. Though the regmap property
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| D | xlnx,zynqmp-power.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
13 The zynqmp-power node describes the power management configurations.
18 const: xlnx,zynqmp-power
25 Standard property to specify a Mailbox. Each value of
26 the mboxes property should contain a phandle to the
27 mailbox controller device node and an args specifier
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| /Documentation/devicetree/ |
| D | usage-model.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 The "Open Firmware Device Tree", or simply Devicetree (DT), is a data
19 is a description of hardware that is readable by an operating system
23 Structurally, the DT is a tree, or acyclic graph with named nodes, and
25 arbitrary data. A mechanism also exists to create arbitrary
26 links from one node to another outside of the natural tree structure.
28 Conceptually, a common set of usage conventions, called 'bindings',
34 maximize use of existing support code, but since property and node
37 however, of creating a new binding without first doing some homework
44 ----------
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