Searched full:algorithms (Results 1 – 25 of 96) sorted by relevance
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| /Documentation/admin-guide/blockdev/ |
| D | zram.rst | 94 currently selected (shown in square brackets) compression algorithms,
100 #show supported compression algorithms
108 algorithms that are supported by zram.
113 Compression algorithms may support specific parameters which can be
117 For example, several compression algorithms support `level` parameter.
118 In addition, certain compression algorithms support pre-trained dictionaries,
119 which significantly change algorithms' characteristics. In order to configure
134 Parameters are algorithm specific: not all algorithms support pre-trained
135 dictionaries, not all algorithms support `level`. Furthermore, for certain
136 algorithms `level` controls the compression level (the higher the value the
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| /Documentation/filesystems/ |
| D | btrfs.rst | 21 * Checksums on data and metadata (multiple algorithms available)
22 * Compression (multiple algorithms available)
26 * Integrated multiple device support, with several raid algorithms
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| D | index.rst | 16 algorithms work.
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| /Documentation/crypto/ |
| D | api-intro.rst | 23 At the lowest level are algorithms, which register dynamically with the
28 abstraction to the underlying algorithms. However, at the user
35 [algorithm api] (for registering algorithms)
100 Adding New Algorithms
112 Algorithms submitted must also be generally patent-free (e.g. IDEA
117 Also check for any RFCs which may relate to the use of specific algorithms,
119 Cipher Algorithms").
188 Original developers of the crypto algorithms:
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| D | intro.rst | 18 The kernel crypto API refers to all algorithms as "transformations".
34 transformations (such as CRC or even compression algorithms) that can
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| D | devel-algos.rst | 1 Developing Cipher Algorithms
40 successfully registered all the given algorithms; if it fails partway
44 return value. Don't try to unregister algorithms that aren't
111 The registration of multi-block cipher algorithms is one of the most
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| /Documentation/devicetree/bindings/crypto/ |
| D | nvidia,tegra234-se-aes.yaml | 7 title: NVIDIA Tegra Security Engine for AES algorithms
11 algorithms - AES-ECB, AES-CBC, AES-OFB, AES-XTS, AES-CTR, AES-GCM, AES-CCM,
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| D | omap-aes.txt | 11 more algorithms) but they are incompatible with OMAP4.
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| D | nvidia,tegra234-se-hash.yaml | 7 title: NVIDIA Tegra Security Engine for HASH algorithms
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-uacce | 40 What: /sys/class/uacce/<dev_name>/algorithms
44 Description: Algorithms supported by this accelerator, separated by new line.
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| D | ima_policy | 75 appraise_algos:= comma-separated list of hash algorithms
78 of these two algorithms.
160 restricts the hash algorithms allowed when writing to the
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| D | sysfs-block-zram | 38 available and selected compression algorithms, change
146 or show secondary compression algorithms.
153 with secondary compression algorithms.
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| /Documentation/filesystems/ext4/ |
| D | index.rst | 4 ext4 Data Structures and Algorithms
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| /Documentation/userspace-api/media/v4l/ |
| D | hsv-formats.rst | 13 useful format for image segmentation algorithms.
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| /Documentation/locking/ |
| D | pi-futex.rst | 33 technique that often cannot be replaced with lockless algorithms. As we
38 algorithms often endangers to ability to do robust reviews of said code.
40 data structures, instead of lockless algorithms. Furthermore, there are
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| /Documentation/userspace-api/media/ |
| D | glossary.rst | 110 A specialized processor that implements a set of algorithms for
111 processing image data. ISPs may implement algorithms for lens
114 algorithms (e.g. automatic exposure, white balance and focus).
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| /Documentation/networking/devlink/ |
| D | hns3.rst | 30 control algorithms, including DCQCN.
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| D | mv88e6xxx.rst | 25 - Select one of four possible hashing algorithms for MAC addresses in
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| /Documentation/admin-guide/pm/ |
| D | intel_uncore_frequency_scaling.rst | 17 performance, SoCs have internal algorithms for scaling uncore frequency. These
18 algorithms monitor workload usage of uncore and set a desirable frequency.
121 per watt. With this feature hardware power management algorithms
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| /Documentation/mm/ |
| D | index.rst | 33 algorithms. It should all be integrated nicely into the above structured
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| /Documentation/devicetree/bindings/mtd/ |
| D | ti,elm.yaml | 14 errors and the location of the error based on BCH algorithms
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| /Documentation/devicetree/bindings/input/ |
| D | cirrus,cs40l50.yaml | 14 integrated DSP, and closed-loop algorithms.
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| /Documentation/driver-api/crypto/iaa/ |
| D | iaa-crypto.rst | 21 one of the supported IAA compression algorithms in whatever facility
22 allows compression algorithms to be selected.
211 As a result, the IAA crypto algorithms and thus the IAA hardware are
216 algorithms can be unregistered by removing the module.
228 The attribute settings at the time the IAA algorithms are registered
616 algorithms are enabled and available. When the IAA crypto algorithms
661 In order to unregister the IAA crypto algorithms, and register new
715 will unregister the current IAA crypto algorithms::
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| /Documentation/networking/device_drivers/ethernet/marvell/ |
| D | octeontx2.rst | 93 - Defines receive side scaling (RSS) algorithms.
94 - Defines segmentation offload algorithms (eg TSO)
297 Hardware algorithms used in scheduling
303 The hardware uses the below algorithms depending on the priority of scheduler queues.
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| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,dsc.yaml | 14 The DSC standard is a specification of the algorithms used for
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