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/Documentation/devicetree/bindings/soc/qcom/
Dqcom,apr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 This binding describes the Qualcomm APR/GPR, APR/GPR is a IPC protocol for
14 communication between Application processor and QDSP. APR/GPR is mainly
20 - qcom,apr
21 - qcom,apr-v2
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Dqcom,apr-services.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr-services.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm APR/GPR services shared parts
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Common parts of a static service in Qualcomm APR/GPR (Asynchronous/Generic
21 APR Service ID
39 qcom,protection-domain:
40 $ref: /schemas/types.yaml#/definitions/string-array
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/Documentation/devicetree/bindings/sound/
Dqcom,q6core.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#
19 - qcom,q6core
22 - compatible
27 - |
28 #include <dt-bindings/soc/qcom,apr.h>
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Dqcom,q6adm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#
19 - qcom,q6adm
23 $ref: /schemas/sound/qcom,q6adm-routing.yaml#
28 - compatible
29 - routing
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Dqcom,q6asm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#
19 - qcom,q6asm
23 $ref: /schemas/sound/qcom,q6asm-dais.yaml#
28 - compatible
29 - dais
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Dqcom,q6afe.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#
19 - qcom,q6afe
21 clock-controller:
22 $ref: /schemas/sound/qcom,q6dsp-lpass-clocks.yaml#
28 $ref: /schemas/sound/qcom,q6dsp-lpass-ports.yaml#
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Dqcom,q6prm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#
19 - qcom,q6prm
21 clock-controller:
22 $ref: /schemas/sound/qcom,q6dsp-lpass-clocks.yaml#
27 - compatible
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Dqcom,q6apm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 - $ref: dai-common.yaml#
15 - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#
20 - qcom,q6apm
24 $ref: /schemas/sound/qcom,q6apm-lpass-dais.yaml#
30 $ref: /schemas/sound/qcom,q6apm-dai.yaml#
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/Documentation/devicetree/bindings/remoteproc/
Dqcom,sc7280-wpss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sc7280-wpss-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
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Dqcom,sc7180-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7180-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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Dqcom,sc7280-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
32 - description: Watchdog interrupt
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/Documentation/ABI/testing/
Dsysfs-devices-system-cpu2 Date: pre-git history
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
18 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
37 See Documentation/admin-guide/cputopology.rst for more information.
43 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
58 Contact: Linux memory management mailing list <linux-mm@kvack.org>
67 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
77 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
89 core_siblings_list: human-readable list of the logical CPU
99 thread_siblings_list: human-readable list of cpuX's hardware
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/Documentation/driver-api/
Dvfio.rst2 VFIO - "Virtual Function I/O" [1]_
7 allotted. This includes x86 hardware with AMD-Vi and Intel VT-d,
12 safe [2]_, non-privileged, userspace drivers.
19 bare-metal device drivers [3]_.
22 field, also benefit from low-overhead, direct device access from
23 userspace. Examples include network adapters (often non-TCP/IP based)
36 ---------------------------
42 as allowing a device read-write access to system memory imposes the
55 For instance, an individual device may be part of a larger multi-
59 could be anything from a multi-function PCI device with backdoors
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/Documentation/arch/x86/
Dresctrl.rst1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
10 - Tony Luck <tony.luck@intel.com>
11 - Vikas Shivappa <vikas.shivappa@intel.com>
38 # mount -t resctrl resctrl [-o cdp[,cdpl2][,mba_MBps][,debug]] /sys/fs/resctrl
57 pseudo-locking is a unique way of using cache control to "pin" or
59 "Cache Pseudo-Locking".
96 own settings for cache use which can over-ride
128 Corresponding region is pseudo-locked. No
131 Indicates if non-contiguous 1s value in CBM is supported.
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/Documentation/arch/arm64/
Darm-acpi.rst23 industry-standard Arm systems, they also apply to more than one operating
25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of
30 ----------------
33 exist in Linux for describing non-enumerable hardware, after all. In this
40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
45 - ACPI’s OSPM defines a power management model that constrains what the
49 - In the enterprise server environment, ACPI has established bindings (such
55 - Choosing a single interface to describe the abstraction between a platform
61 - The new ACPI governance process works well and Linux is now at the same
70 responsibility for hardware behaviour cannot solely be the domain of the
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/Documentation/scsi/
DChangeLog.megaraid1 Release Date : Thu Nov 16 15:32:35 EST 2006 -
9 and re-initialize its internal RAID structure.
14 2. Authors email-id domain name changed from lsil.com to lsi.com.
17 Release Date : Fri May 19 09:31:45 EST 2006 - Seokmann Ju <sju@lsil.com>
23 Root Cause: the driver registered controllers as 64-bit DMA capable
26 identifying 64-bit DMA capable controllers.
28 > -----Original Message-----
31 > To: linux-scsi@vger.kernel.org; Kolli, Neela; Mukker, Atul;
86 issue on 64-bit platform.
93 > -----Original Message-----
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