Searched +full:armada +full:- +full:xp +full:- +full:sdram +full:- +full:controller (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/memory-controllers/ |
| D | marvell,mvebu-sdram-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/marvell,mvebu-sdram-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MVEBU SDRAM controller
10 - Jan Luebbe <jlu@pengutronix.de>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 const: marvell,armada-xp-sdram-controller
21 - compatible
22 - reg
[all …]
|
| /Documentation/devicetree/bindings/clock/ |
| D | mvebu-core-clock.txt | 4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
7 The following is a list of provided IDs and clock names on Armada 370/XP:
14 The following is a list of provided IDs and clock names on Armada 375:
20 The following is a list of provided IDs and clock names on Armada 380/385:
26 The following is a list of provided IDs and clock names on Armada 39x:
30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
44 3 = ddrclk (DDR controller clock derived from CPU0 clock)
49 2 = ddrclk (DDR controller clock derived from CPU0 clock)
52 - compatible : shall be one of the following:
[all …]
|
| /Documentation/devicetree/bindings/bus/ |
| D | mvebu-mbus.txt | 6 - compatible: Should be set to one of the following:
7 marvell,armada370-mbus
8 marvell,armadaxp-mbus
9 marvell,armada375-mbus
10 marvell,armada380-mbus
11 marvell,kirkwood-mbus
12 marvell,dove-mbus
13 marvell,orion5x-88f5281-mbus
14 marvell,orion5x-88f5182-mbus
15 marvell,orion5x-88f5181-mbus
[all …]
|