Searched +full:child +full:- +full:node (Results 1 – 25 of 365) sorted by relevance
12345678910>>...15
| /Documentation/networking/ |
| D | fib_trie.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 LC-trie implementation notes
7 Node types
8 ----------
10 An end node with data. This has a copy of the relevant key, along
14 trie node or tnode
15 An internal node, holding an array of child (leaf or tnode) pointers,
19 ------------------------
22 child array - the "child index". See Level Compression.
26 the child array. See Path Compression.
[all …]
|
| /Documentation/devicetree/bindings/mfd/ |
| D | canaan,k210-sysctl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
20 - const: canaan,k210-sysctl
21 - const: syscon
22 - const: simple-mfd
29 clock-names:
31 - const: pclk
[all …]
|
| D | brcm,bcm6358-gpio-sysctl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
18 "#address-cells": true
20 "#size-cells": true
24 - const: brcm,bcm6358-gpio-sysctl
25 - const: syscon
[all …]
|
| /Documentation/devicetree/bindings/powerpc/opal/ |
| D | sensor-groups.txt | 2 -------------------------------
4 Node: /ibm,opal/sensor-groups
7 servers. Each child node indicates a sensor group.
9 - compatible : Should be "ibm,opal-sensor-group"
11 Each child node contains below properties:
13 - type : String to indicate the type of sensor-group
15 - sensor-group-id: Abstract unique identifier provided by firmware of
16 type <u32> which is used for sensor-group
20 - ibm,chip-id : Chip ID
22 - sensors : Phandle array of child nodes of /ibm,opal/sensor/
[all …]
|
| /Documentation/devicetree/bindings/mmc/ |
| D | amlogic,meson-mx-sdio.txt | 13 - compatible : must be one of
14 - "amlogic,meson8-sdio"
15 - "amlogic,meson8b-sdio"
16 along with the generic "amlogic,meson-mx-sdio"
17 - reg : mmc controller base registers
18 - interrupts : mmc controller interrupt
19 - #address-cells : must be 1
20 - size-cells : must be 0
21 - clocks : phandle to clock providers
22 - clock-names : must contain "core" and "clkin"
[all …]
|
| D | atmel-hsmci.txt | 7 by mmc.txt and the properties used by the atmel-mci driver.
9 1) MCI node
12 - compatible: should be "atmel,hsmci"
13 - #address-cells: should be one. The cell is the slot id.
14 - #size-cells: should be zero.
15 - at least one slot node
16 - clock-names: tuple listing input clock names.
18 - clocks: phandles to input clocks.
20 The node contains child nodes for each slot that the platform uses
22 Example MCI node:
[all …]
|
| /Documentation/devicetree/bindings/leds/ |
| D | leds-mt6323.txt | 4 controllers are defined as the subnode of the function node provided by MT6323
5 PMIC controller that is being defined as one kind of Muti-Function Device (MFD)
15 - compatible : Must be one of
16 - "mediatek,mt6323-led"
17 - "mediatek,mt6331-led"
18 - "mediatek,mt6332-led"
19 - address-cells : Must be 1
20 - size-cells : Must be 0
22 Each led is represented as a child node of the mediatek,mt6323-led that
24 LED child nodes can be supported.
[all …]
|
| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,imx-weim-peripherals.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
14 This binding is meant for the child nodes of the WEIM node. The node
23 fsl,weim-cs-timing:
24 $ref: /schemas/types.yaml#/definitions/uint32-array
26 Timing values for the child node.
[all …]
|
| /Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
24 - #dma-cells: Should be <1>, see "dmas" property below
25 - reg: Should contain VDMA registers location and length.
26 - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
[all …]
|
| /Documentation/devicetree/ |
| D | of_unittest.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 (1) Documentation/devicetree/usage-model.rst
45 from 'scripts/dtc/of_unittest_expect --help'.
48 3. Test-data
51 The Device Tree Source file (drivers/of/unittest-data/testcases.dts) contains
56 drivers/of/unittest-data/tests-interrupts.dtsi
57 drivers/of/unittest-data/tests-platform.dtsi
58 drivers/of/unittest-data/tests-phandle.dtsi
59 drivers/of/unittest-data/tests-match.dtsi
81 -------------------------
[all …]
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | adp1653.txt | 5 - compatible: Must contain "adi,adp1653"
7 - reg: I2C slave address
9 - enable-gpios: Specifier of the GPIO connected to EN pin
11 There are two LED outputs available - flash and indicator. One LED is
12 represented by one child node, nodes need to be named "flash" and "indicator".
14 Required properties of the LED child node:
15 - led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt
17 Required properties of the flash LED child node:
19 - flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt
20 - flash-timeout-us : see Documentation/devicetree/bindings/leds/common.txt
[all …]
|
| D | mt9m001.txt | 1 MT9M001: 1/2-Inch Megapixel Digital Image Sensor
3 The MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital
8 - compatible: shall be "onnn,mt9m001".
9 - clocks: reference to the master clock into sensor
13 - reset-gpios: GPIO handle which is connected to the reset pin of the chip.
15 - standby-gpios: GPIO handle which is connected to the standby pin of the chip.
18 The device node must contain one 'port' child node with one 'endpoint' child
19 sub-node for its digital output video port, in accordance with the video
21 Documentation/devicetree/bindings/media/video-interfaces.txt
26 camera-sensor@5d {
[all …]
|
| D | mt9m111.txt | 4 array size of 1280H x 1024V. It is programmable through a simple two-wire serial
8 - compatible: value should be "micron,mt9m111"
9 - clocks: reference to the master clock.
10 - clock-names: shall be "mclk".
12 The device node must contain one 'port' child node with one 'endpoint' child
13 sub-node for its digital output video port, in accordance with the video
15 Documentation/devicetree/bindings/media/video-interfaces.txt
18 - pclk-sample: For information see ../video-interfaces.txt. The value is set to
28 clock-names = "mclk";
32 remote-endpoint = <&pxa_camera>;
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | riscv,aplic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Advanced Platform Level Interrupt Controller (APLIC)
10 - Anup Patel <anup@brainfault.org>
13 The RISC-V advanced interrupt architecture (AIA) defines an advanced
15 in a RISC-V platform. The RISC-V AIA specification can be found at
16 https://github.com/riscv/riscv-aia.
18 The RISC-V APLIC is implemented as hierarchical APLIC domains where all
[all …]
|
| /Documentation/devicetree/bindings/usb/ |
| D | octeon-usb.txt | 3 1) Main node
7 - compatible: must be "cavium,octeon-5750-usbn"
9 - reg: specifies the physical base address of the USBN block and
12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
18 - ranges: specifies the translation between child address space and parent
21 - clock-frequency: speed of the USB reference clock. Allowed values are
24 - cavium,refclk-type: type of the USB reference clock. Allowed values are
27 - refclk-frequency: deprecated, use "clock-frequency".
29 - refclk-type: deprecated, use "cavium,refclk-type".
[all …]
|
| D | dwc3-cavium.txt | 4 - compatible: Should contain "cavium,octeon-7130-usb-uctl"
6 Required child node:
7 A child node must exist to represent the core DWC3 IP block. The name of
8 the node is not important. The content of the node is defined in dwc3.txt.
10 Example device node:
13 compatible = "cavium,octeon-7130-usb-uctl";
16 #address-cells = <0x00000002>;
17 #size-cells = <0x00000002>;
18 refclk-frequency = <0x05f5e100>;
19 refclk-type-ss = "dlmc_ref_clk0";
[all …]
|
| /Documentation/devicetree/bindings/mtd/ |
| D | samsung-s3c2410.txt | 4 - compatible : The possible values are:
5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
8 - reg : register's location and length.
9 - #address-cells, #size-cells : see nand-controller.yaml
10 - clocks : phandle to the nand controller clock
11 - clock-names : must contain "nand"
13 Optional child nodes:
14 Child nodes representing the available nand chips.
[all …]
|
| /Documentation/devicetree/bindings/soc/dove/ |
| D | pmu.txt | 4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
6 case the ranges node is required.
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
[all …]
|
| /Documentation/devicetree/bindings/clock/ |
| D | silabs,si5341.txt | 6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
30 ==I2C device node==
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
37 "silabs,si5344" - Si5344 A/B/C/D
[all …]
|
| /Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
39 2 - cpu-map node
42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
43 child of the cpus node and provides a container where the actual topology
[all …]
|
| /Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
[all …]
|
| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | cpm.txt | 7 * Root CPM node
10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
11 - reg : A 48-byte region beginning with CPCR.
15 #address-cells = <1>;
16 #size-cells = <1>;
17 #interrupt-cells = <2>;
18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
24 - fsl,cpm-command : This value is ORed with the opcode and command flag
27 - fsl,cpm-brg : Indicates which baud rate generator the device
32 - reg : Unless otherwise specified, the first resource represents the
[all …]
|
| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec6.txt | 4 -SEC 6 Node
5 -Job Ring Node
6 -Full Example
9 SEC 6 Node
13 Node defines the base address of the SEC 6 block.
16 For example, In C293, we could see three SEC 6 node.
20 - compatible
23 Definition: Must include "fsl,sec-v6.0".
25 - fsl,sec-era
31 - #address-cells
[all …]
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | npcm750-pwm-fan.txt | 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
9 Required properties for pwm-fan node
10 - #address-cells : should be 1.
11 - #size-cells : should be 0.
12 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
13 : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
14 - reg : specifies physical base address and size of the registers.
15 - reg-names : must contain:
18 - clocks : phandle of reference clocks.
[all …]
|
| /Documentation/devicetree/bindings/nvmem/ |
| D | zii,rave-sp-eeprom.txt | 5 Tree node is specified as a child of the node corresponding to the
7 Documentation/devicetree/bindings/mfd/zii,rave-sp.txt)
11 - compatible: Should be "zii,rave-sp-eeprom"
15 - zii,eeprom-name: Unique EEPROM identifier describing its function in the
20 Data cells are child nodes of eerpom node, bindings for which are
25 rave-sp {
26 compatible = "zii,rave-sp-rdu1";
27 current-speed = <38400>;
30 compatible = "zii,rave-sp-eeprom";
32 #address-cells = <1>;
[all …]
|
12345678910>>...15