Searched +full:common +full:- +full:mode +full:- +full:channel (Results 1 – 25 of 96) sorted by relevance
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad4695.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of similar multi-channel analog to digital converters with SPI bus.
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad4695
27 - adi,ad4696
28 - adi,ad4697
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| D | adc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IIO Common Properties for ADC Channels
10 - Jonathan Cameron <jic23@kernel.org>
13 A few properties are defined in a common way ADC channels.
17 pattern: "^channel(@[0-9a-f]+)?$"
19 A channel index should match reg.
25 description: Unique name to identify which channel this is.
29 description: If provided, the channel is to be used in bipolar mode.
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| D | adi,ad7173.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
16 can be used in high precision, low noise single channel applications
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
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| /Documentation/devicetree/bindings/display/ |
| D | dsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for DSI Display Panels
10 - Linus Walleij <linus.walleij@linaro.org>
13 This document defines device tree properties common to DSI, Display
25 channel should have a node "panel" for their virtual channel with their
26 reg-property set to the virtual channel number, usually there is just
27 one virtual channel, number 0.
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| /Documentation/iio/ |
| D | ad4695.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
26 ----------------
30 4-wire mode
33 In this mode, CNV and CS are tied together and there is a single SDO line.
35 .. code-block::
37 +-------------+ +-------------+
38 | CS |<-+------| CS |
39 | CNV |<-+ | |
42 | SDI |<--------| SDO |
43 | SDO |-------->| SDI |
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-adc-hi8435 | 7 Could be either "GND-Open" or "Supply-Open" mode. Y is a
8 threshold detector input channel. Channels 0..7, 8..15, 16..23
9 and 24..31 has common sensor types.
16 Channel Y low voltage threshold. If sensor input voltage goes lower then
19 is separately set for "GND-Open" and "Supply-Open" modes.
20 Channels 0..31 have common low threshold values, but could have different
35 Channel Y high voltage threshold. If sensor input voltage goes higher then
38 is separately set for "GND-Open" and "Supply-Open" modes.
40 Channels 0..31 have common high threshold values, but could have different
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
14 Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
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| D | richtek,rt8515.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT8515 1.5A dual channel LED driver
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Richtek RT8515 is a dual channel (two mode) LED driver that
14 supports driving a white LED in flash or torch mode. The maximum
15 current for each mode is defined in hardware using two resistors
22 enf-gpios:
26 ent-gpios:
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| D | leds-rt4505.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-rt4505.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT4505 Single Channel LED Driver
10 - ChiYuan Huang <cy_huang@richtek.com>
14 torch and flash mode, respectively.
17 https://www.richtek.com/assets/product_file/RT4505/DS4505-02.pdf
29 $ref: common.yaml#
33 - compatible
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| D | mediatek,mt6370-indicator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/mediatek,mt6370-indicator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alice Chen <alice_chen@richtek.com>
14 Add MT6370 LED driver include 4-channel RGB LED support Register/PWM/Breath Mode
18 const: mediatek,mt6370-indicator
20 "#address-cells":
23 "#size-cells":
27 "^multi-led@[0-3]$":
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| D | mediatek,mt6370-flashlight.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/mediatek,mt6370-flashlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alice Chen <alice_chen@richtek.com>
14 Add MT6370 flash LED driver include 2-channel flash LED support Torch/Strobe Mode.
18 const: mediatek,mt6370-flashlight
20 "#address-cells":
23 "#size-cells":
27 "^led@[0-1]$":
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| /Documentation/devicetree/bindings/sound/ |
| D | microchip,sama7g5-i2smcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I2S Multi-Channel Controller
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
15 multi-channel audio codecs. It consists of a receiver, a transmitter and a
16 common clock generator that can be enabled separately to provide Adapter,
19 multi-channel is supported by using multiple data pins, output and
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| D | fsl,ssi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
15 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
17 playback and DMA channel 3 for capture. The developer can choose which
18 DMA controller to use, but the channels themselves are hard-wired. The
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| D | fsl,qmc-audio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,qmc-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
15 It provides several DAIs. For each DAI, the DAI is working in interleaved mode
16 if only one QMC channel is used by the DAI or it is working in non-interleaved
17 mode if several QMC channels are used by the DAI.
20 - $ref: dai-common.yaml#
24 const: fsl,qmc-audio
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| D | adi,max98388.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ryan Lee <ryans.lee@analog.com>
13 The MAX98388 is a mono Class-D speaker amplifier with I/V feedback.
18 - $ref: dai-common.yaml#
23 - adi,max98388
28 '#sound-dai-cells':
31 adi,vmon-slot-no:
38 adi,imon-slot-no:
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| D | davinci-mcasp-audio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-choudhary@ti.com>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
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| D | adi,adau7118.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter
11 - Nuno Sá <nuno.sa@analog.com>
14 Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter over I2C or HW
15 standalone mode.
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU7118.pdf
19 - $ref: dai-common.yaml#
24 - adi,adau7118
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| /Documentation/hwmon/ |
| D | pcf8591.rst | 17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
36 Pins AIN3 is the common negative differential input
39 - mode 2 : single ended and differential mixed
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common properties for LPDDR types
11 range of legal values for each. This file defines the common parts that can be
13 an LPDDR channel node.
16 - Krzysztof Kozlowski <krzk@kernel.org>
23 lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID
32 channel.
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| /Documentation/devicetree/bindings/hsi/ |
| D | nokia-modem.txt | 3 The Nokia modem HSI client follows the common HSI client binding
8 - compatible: Should be one of
9 "nokia,n900-modem"
10 "nokia,n950-modem"
11 "nokia,n9-modem"
12 - hsi-channel-names: Should contain the following strings
13 "mcsaab-control"
14 "speech-control"
15 "speech-data"
16 "mcsaab-data"
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | mediatek,mt6370-backlight.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/mediatek,mt6370-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiaEn Wu <chiaen_wu@richtek.com>
15 4 channels of 8 series WLEDs. Each channel supports up to 30mA of current
21 - $ref: common.yaml#
26 - mediatek,mt6370-backlight
27 - mediatek,mt6372-backlight
29 default-brightness:
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| /Documentation/devicetree/bindings/display/panel/ |
| D | sharp,lq101r1sx01.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <treding@nvidia.com>
13 This panel requires a dual-channel DSI host to operate. It supports two modes:
14 - left-right: each channel drives the left or right half of the screen
15 - even-odd: each channel drives the even or odd lines of the screen
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
22 Note that in video mode the DSI-LINK1 interface always provides the left/even
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| /Documentation/leds/ |
| D | leds-lp5521.rst | 10 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
13 -----------
25 1) Legacy interface - enginex_mode and enginex_load
33 store program (visible only in engine load mode)
35 Example (start to blink the channel 2 led)::
46 2) Firmware interface - LP55xx common interface
48 For the details, please refer to 'firmware' section in leds-lp55xx.txt
53 the clock mode is automatically set to the requested one.
55 Each channel has its own led current settings.
57 - /sys/class/leds/lp5521:channel0/led_current - RW
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| /Documentation/devicetree/bindings/hwmon/ |
| D | fan-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/hwmon/fan-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Fan Properties
10 - Naresh Solanki <naresh.solanki@9elements.com>
11 - Billy Tsai <billy_tsai@aspeedtech.com>
14 max-rpm:
20 min-rpm:
26 pulses-per-revolution:
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| /Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
13 creating a common ground for discussion, terms and their definitions
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
45 same branch can be used in single mode or in lockstep mode. When
50 of correcting more errors than on single mode.
52 * Single-channel
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