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/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
11 - Lee Jones <lee@kernel.org>
12 - Alexandre Courbot <acourbot@nvidia.com>
17 Voltage Table:
18 When in this mode, a voltage table (See below) of predefined voltage <=>
19 duty-cycle values must be provided via DT. Limitations are that the
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Drichtek,rt5739.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT5739 Step-Down Buck Converter
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT5739 is a step-down switching buck converter that can deliver the
14 programmable output voltage from 300mV to 1300mV with wide input voltage
15 supply of 2.5V to 5.5V. It can provide up to 3.5A continuous current
19 - $ref: regulator.yaml#
24 - richtek,rt5733
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Drichtek,rtq2208.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alina Yu <alina_yu@richtek.com>
14 multi-configurable synchronous buck converters and two LDOs.
16 Bucks support "regulator-allowed-modes" and "regulator-mode". The former defines the permitted
20 operation modes for all buck rails, automatic power saving mode (Auto mode) and forced continuous
25 0 - Auto mode for power saving, which reducing the switching frequency at light load condition
27 …1 - FCCM to meet the strict voltage regulation accuracy, which keeping constant switching frequenc…
35 - richtek,rtq2208
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/Documentation/devicetree/bindings/hwmon/
Dti,ina3221.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments INA3221 Current and Voltage Monitor
10 - Jean Delvare <jdelvare@suse.com>
11 - Guenter Roeck <linux@roeck-us.net>
20 ti,single-shot:
22 This chip has two power modes: single-shot (chip takes one measurement
23 and then shuts itself down) and continuous (chip takes continuous
24 measurements). The continuous mode is more reliable and suitable for
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/Documentation/devicetree/bindings/iio/adc/
Daspeed,ast2600-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Billy Tsai <billy_tsai@aspeedtech.com>
13 • 10-bits resolution for 16 voltage channels.
14 • The device split into two individual engine and each contains 8 voltage
16 • Channel scanning can be non-continuous.
21 • Built-in a compensating method.
22 • Built-in a register to trim internal reference voltage.
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Dnxp,imx93-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
15 One-Shot and Scan (continuous) conversions. Programmable DMA
18 also has Self-test logic and Software-initiated calibration.
22 const: nxp,imx93-adc
29 - description: WDGnL, watchdog threshold interrupt requests.
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Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
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/Documentation/ABI/testing/
Dsysfs-class-power-twl403012 "continuous" activate mode described as "linear" in
15 when voltage drops.
19 be taken that battery is not over-charged.
Dsysfs-bus-iio3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
25 Contact: linux-iio@vger.kernel.org
31 Contact: linux-iio@vger.kernel.org
38 Contact: linux-iio@vger.kernel.org
44 The contents of the label are free-form, but there are some
51 * "proximity-wifi"
52 * "proximity-lte"
53 * "proximity-wifi-lte"
54 * "proximity-wifi-left"
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/Documentation/devicetree/bindings/input/touchscreen/
Dbrcm,iproc-touchscreen.txt4 - compatible: must be "brcm,iproc-touchscreen"
5 - ts_syscon: handler of syscon node defining physical base
9 - clocks: The clock provided by the SOC to driver the tsc
10 - clock-names: name for the clock
11 - interrupts: The touchscreen controller's interrupt
12 - address-cells: Specify the number of u32 entries needed in child nodes.
14 - size-cells: Specify number of u32 entries needed to specify child nodes size
18 - scanning_period: Time between scans. Each step is 1024 us. Valid 1-256.
19 - debounce_timeout: Each step is 512 us. Valid 0-255
20 - settling_timeout: The settling duration (in ms) is the amount of time
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/Documentation/hwmon/
Dsysfs-interface.rst5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
48 types for sensor chips are "in" (voltage), "temp" (temperature) and
61 to cause an alarm) is chip-dependent.
69 ----------------
76 -------------------------------------------------------------------------
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/Documentation/admin-guide/pm/
Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
19 different clock frequency and voltage configurations, often referred to as
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
21 the higher the clock frequency and the higher the voltage, the more instructions
23 frequency and the higher the voltage, the more energy is consumed over a unit of
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
37 different frequency/voltage configurations or (in the ACPI terminology) to be
38 put into different P-states.
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Damd-pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
5 ``amd-pstate`` CPU Performance Scaling Driver
16 ``amd-pstate`` is the AMD CPU performance scaling driver that introduces a
20 than legacy ACPI hardware P-States. Current AMD CPU/APU platforms are using
21 the ACPI P-states driver to manage CPU frequency and clocks with switching
22 only in 3 P-states. CPPC replaces the ACPI P-states controls and allows a
23 flexible, low-latency interface for the Linux kernel to directly
26 ``amd-pstate`` leverages the Linux kernel governors such as ``schedutil``,
30 Volume 2: System Programming [1]_). Currently, ``amd-pstate`` supports basic
40 continuous, abstract, and unit-less performance value in a scale that is
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