Searched +full:cpu +full:- +full:3 (Results 1 – 25 of 645) sorted by relevance
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| /Documentation/translations/zh_CN/mm/ |
| D | mmu_notifier.rst | 28 - 上页表锁
29 - 清除页表项并通知 ([pmd/pte]p_huge_clear_flush_notify())
30 - 设置页表项以指向新页
37 两个地址addrA和addrB，这样|addrA - addrB| >= PAGE_SIZE，我们假设它们是COW的
42 [Time N] --------------------------------------------------------------------
43 CPU-thread-0 {尝试写到addrA}
44 CPU-thread-1 {尝试写到addrB}
45 CPU-thread-2 {}
46 CPU-thread-3 {}
47 DEV-thread-0 {读取addrA并填充设备TLB}
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| /Documentation/admin-guide/thermal/ |
| D | intel_powerclamp.rst | 6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
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| /Documentation/mm/ |
| D | mmu_notifier.rst | 8 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
9 thing like ATS/PASID to get the IOMMU to walk the CPU page table to access a
23 - take page table lock
24 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
25 - set page table entry to point to new page
33 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
38 [Time N] --------------------------------------------------------------------
39 CPU-thread-0 {try to write to addrA}
40 CPU-thread-1 {try to write to addrB}
41 CPU-thread-2 {}
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| /Documentation/devicetree/bindings/ |
| D | numa.txt | 6 1 - Introduction
18 2 - numa-node-id
23 a node id is a 32-bit integer.
26 numa-node-id property which contains the node id of the device.
30 numa-node-id = <0>;
33 numa-node-id = <1>;
36 3 - distance-map
39 The optional device tree node distance-map describes the relative
42 - compatible : Should at least contain "numa-distance-map-v1".
44 - distance-matrix
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| /Documentation/ABI/stable/ |
| D | sysfs-devices-system-cpu | 1 What: /sys/devices/system/cpu/dscr_default
2 Date: 13-May-2014
6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
9 all per-CPU defaults at the same time.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
13 Date: 13-May-2014
17 a CPU.
22 on any CPU where it executes (overriding the value described
27 What: /sys/devices/system/cpu/cpuX/topology/physical_package_id
33 What: /sys/devices/system/cpu/cpuX/topology/die_id
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| /Documentation/tools/rtla/ |
| D | rtla-hwnoise.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 rtla-hwnoise
6 ------------------------------------------
7 Detect and quantify hardware-related noise
8 ------------------------------------------
22 of threads as a consequence, only non-maskable interrupts and hardware-related
38 In the example below, the **rtla hwnoise** tool is set to run on CPUs *1-7*
39 on a system with 8 cores/16 threads with hyper-threading enabled.
45 # rtla hwnoise -c 1-7 -T 1 -d 10m -q
46 Hardware-related Noise
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| /Documentation/arch/x86/ |
| D | topology.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
35 - packages
36 - cores
37 - threads
48 Package-related topology information in the kernel:
50 - topology_num_threads_per_package()
54 - topology_num_cores_per_package()
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| /Documentation/translations/zh_CN/core-api/ |
| D | workqueue.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/core-api/workqueue.rst
109 每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
139 参数 - ``@name`` , ``@flags`` 和 ``@max_active`` 。
148 ---------
202 --------------
234 0 w0 starts and burns CPU
236 15 w0 wakes up and burns CPU
238 20 w1 starts and burns CPU
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| /Documentation/translations/zh_TW/arch/arm64/ |
| D | booting.txt | 1 SPDX-License-Identifier: GPL-2.0
15 ---------------------------------------------------------------------
30 ---------------------------------------------------------------------
40 AArch64 異常模型由多個異常級（EL0 - EL3）組成，對於 EL0 和 EL1 異常級
45 這個術語來定義在將控制權交給 Linux 內核前 CPU 上執行的所有軟件。
53 3、解壓內核映像
58 -----------------
69 ---------------
80 3、解壓內核映像
81 -------------
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| /Documentation/translations/zh_CN/arch/arm64/ |
| D | booting.txt | 12 ---------------------------------------------------------------------
26 ---------------------------------------------------------------------
36 AArch64 异常模型由多个异常级（EL0 - EL3）组成，对于 EL0 和 EL1 异常级
41 这个术语来定义在将控制权交给 Linux 内核前 CPU 上执行的所有软件。
49 3、解压内核映像
54 -----------------
65 ---------------
76 3、解压内核映像
77 -------------
87 -------------
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| /Documentation/translations/zh_CN/admin-guide/ |
| D | cputopology.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/admin-guide/cputopology.rst
15 /sys/devices/system/cpu/cpuX/topology/。请阅读ABI文件：
16 Documentation/ABI/stable/sysfs-devices-system-cpu。
21 对于支持这个特性的体系结构，它必须在include/asm-XXX/topology.h中定义这些宏中的一部分::
23 #define topology_physical_package_id(cpu)
24 #define topology_die_id(cpu)
25 #define topology_cluster_id(cpu)
26 #define topology_core_id(cpu)
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| /Documentation/translations/zh_TW/admin-guide/ |
| D | cputopology.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_TW.rst
4 :Original: Documentation/admin-guide/cputopology.rst
15 /sys/devices/system/cpu/cpuX/topology/。請閱讀ABI文件：
16 Documentation/ABI/stable/sysfs-devices-system-cpu。
21 對於支持這個特性的體系結構，它必須在include/asm-XXX/topology.h中定義這些宏中的一部分::
23 #define topology_physical_package_id(cpu)
24 #define topology_die_id(cpu)
25 #define topology_cluster_id(cpu)
26 #define topology_core_id(cpu)
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| /Documentation/admin-guide/ |
| D | cputopology.rst | 2 How CPU topology info is exported via sysfs
5 CPU topology info is exported via sysfs. Items (attributes) are similar
7 /sys/devices/system/cpu/cpuX/topology/. Please refer to the ABI file:
8 Documentation/ABI/stable/sysfs-devices-system-cpu.
10 Architecture-neutral, drivers/base/topology.c, exports these attributes.
16 these macros in include/asm-XXX/topology.h::
18 #define topology_physical_package_id(cpu)
19 #define topology_die_id(cpu)
20 #define topology_cluster_id(cpu)
21 #define topology_core_id(cpu)
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| D | kernel-per-CPU-kthreads.rst | 2 Reducing OS jitter due to per-cpu kthreads
5 This document lists per-CPU kthreads in the Linux kernel and presents
6 options to control their OS jitter. Note that non-per-CPU kthreads are
7 not listed here. To reduce OS jitter from non-per-CPU kthreads, bind
8 them to a "housekeeping" CPU dedicated to such work.
13 - Documentation/core-api/irq/irq-affinity.rst: Binding interrupts to sets of CPUs.
15 - Documentation/admin-guide/cgroup-v1: Using cgroups to bind tasks to sets of CPUs.
17 - man taskset: Using the taskset command to bind tasks to sets
20 - man sched_setaffinity: Using the sched_setaffinity() system
23 - /sys/devices/system/cpu/cpuN/online: Control CPU N's hotplug state,
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| /Documentation/core-api/ |
| D | workqueue.rst | 32 worker thread per CPU and a single threaded (ST) wq had one worker
33 thread system-wide. A single MT wq needed to keep around the same
35 wq users over the years and with the number of CPU cores continuously
42 worker pool. An MT wq could provide only one execution context per CPU
60 * Use per-CPU unified worker pools shared by all wq to provide
85 worker-pools.
87 The cmwq design differentiates between the user-facing workqueues that
89 which manages worker-pools and processes the queued work items.
91 There are two worker-pools, one for normal work items and the other
92 for high priority ones, for each possible CPU and some extra
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-qcom-hw.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-qcom-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
21 - description: v1 of CPUFREQ HW
23 - enum:
24 - qcom,qcm2290-cpufreq-hw
25 - qcom,sc7180-cpufreq-hw
26 - qcom,sdm670-cpufreq-hw
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| /Documentation/hwmon/ |
| D | smsc47m192.rst | 10 Addresses scanned: I2C 0x2c - 0x2d
23 - Hartmut Rick <linux@rick.claranet.de>
25 - Special thanks to Jean Delvare for careful checking
30 -----------
33 of the SMSC LPC47M192 and compatible Super-I/O chips.
35 These chips support 3 temperature channels and 8 voltage inputs
36 as well as CPU voltage VID input.
42 Voltages and temperatures are measured by an 8-bit ADC, the resolution
45 192 counts, i.e. 3/4 of the full range. Thus the available range for
52 bit 4 of the encoded CPU voltage. This means that you either get
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| /Documentation/translations/zh_CN/cpu-freq/ |
| D | cpufreq-stats.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/cpu-freq/cpufreq-stats.rst
28 3. 配置cpufreq-stats
34 cpufreq-stats是一种为每个CPU提供CPU频率统计的驱动。
35 这些统计数据以/sysfs中一系列只读接口的形式呈现。cpufreq-stats接口（若已配置）将为每个CPU生成
36 /sysfs（<sysfs root>/devices/system/cpu/cpuX/cpufreq/stats/）中cpufreq目录下的stats目录。
48 - time_in_state
49 - total_trans
50 - trans_table
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| /Documentation/translations/zh_TW/cpu-freq/ |
| D | cpufreq-stats.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_TW.rst
5 :Original: Documentation/cpu-freq/cpufreq-stats.rst
28 3. 配置cpufreq-stats
34 cpufreq-stats是一種爲每個CPU提供CPU頻率統計的驅動。
35 這些統計數據以/sysfs中一系列只讀接口的形式呈現。cpufreq-stats接口（若已配置）將爲每個CPU生成
36 /sysfs（<sysfs root>/devices/system/cpu/cpuX/cpufreq/stats/）中cpufreq目錄下的stats目錄。
48 - time_in_state
49 - total_trans
50 - trans_table
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| /Documentation/cpu-freq/ |
| D | cpufreq-stats.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 3. Configuring cpufreq-stats
22 cpufreq-stats is a driver that provides CPU frequency statistics for each CPU.
25 in /sysfs (<sysfs root>/devices/system/cpu/cpuX/cpufreq/stats/) for each CPU.
29 that may be running on your CPU. So, it will work with any cpufreq_driver.
37 - time_in_state
38 - total_trans
39 - trans_table
48 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # ls -l
50 drwxr-xr-x 2 root root 0 May 14 16:06 .
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| /Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 2 Secondary CPU enable-method "al,alpine-smp" binding
5 This document describes the "al,alpine-smp" method for
7 "al,alpine-smp" enable method should be defined in the
10 Enable method name: "al,alpine-smp"
12 Compatible CPUs: "arm,cortex-a15"
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
20 * Alpine CPU resume registers
22 The CPU resume register are used to define required resume address after
26 - compatible : Should contain "al,alpine-cpu-resume".
27 - reg : Offset and length of the register set for the device
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| /Documentation/scheduler/ |
| D | sched-stats.rst | 16 12 which was in the kernel from 2.6.13-2.6.19 (version 13 never saw a kernel
17 release). Some counters make more sense to be per-runqueue; other to be
18 per-domain. Note that domains (and their associated information) will only
22 statistics for each cpu listed, and there may well be more than one
38 Note that any such script will necessarily be version-specific, as the main
42 CPU statistics
43 --------------
44 cpu<N> 1 2 3 4 5 6 7 8 9
54 3) # of times schedule() was called
60 6) # of times try_to_wake_up() was called to wake up the local cpu
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| /Documentation/devicetree/bindings/interconnect/ |
| D | qcom,msm8998-bwmon.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17 - Measuring the bandwidth between CPUs and Last Level Cache Controller -
19 - Measuring the bandwidth between Last Level Cache Controller and memory
20 (DDR) - called LLCC BWMON.
25 - const: qcom,msm8998-bwmon # BWMON v4
26 - items:
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| /Documentation/bpf/ |
| D | clang-notes.rst | 13 Clang defined "CPU" versions, where a CPU version of 3 corresponds to the current eBPF ISA.
15 Clang can select the eBPF ISA version using ``-mcpu=v3`` for example to select version 3.
20 For CPU versions prior to 3, Clang v7.0 and later can enable ``BPF_ALU`` support with
21 ``-Xclang -target-feature -Xclang +alu32``. In CPU version 3, support is automatically included.
26 If ``-O0`` is used, Clang will generate the ``BPF_CALL | BPF_X | BPF_JMP`` (0x8d)
32 Clang can generate atomic instructions by default when ``-mcpu=v3`` is
33 enabled. If a lower version for ``-mcpu`` is set, the only atomic instruction
35 the atomics features, while keeping a lower ``-mcpu`` version, you can use
36 ``-Xclang -target-feature -Xclang +alu32``.
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,saw2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 power-controller that transitions a piece of hardware (like a processor or
27 - enum:
28 - qcom,ipq4019-saw2-cpu
29 - qcom,ipq4019-saw2-l2
30 - qcom,ipq8064-saw2-cpu
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