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/Documentation/devicetree/bindings/riscv/
Dcpus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
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/Documentation/admin-guide/
Dbcache.rst2 A block layer cache (bcache)
6 nice if you could use them as cache... Hence bcache.
11 This is the git repository of bcache-tools:
12 https://git.kernel.org/pub/scm/linux/kernel/git/colyli/bcache-tools.git/
17 It's designed around the performance characteristics of SSDs - it only allocates
25 great lengths to protect your data - it reliably handles unclean shutdown. (It
29 Writeback caching can use most of the cache for buffering writes - writing
36 average is above the cutoff it will skip all IO from that task - instead of
38 thus entirely bypass the cache.
41 from disk or invalidating cache entries. For unrecoverable errors (meta data
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Dmd.rst5 ---------------------------------
24 md=d<md device no.>,dev0,dev1,...,devn
49 -1 linear mode
58 (raid-0 and raid-1 only)
78 --------------------------------------
87 that all auto-detected arrays are assembled as partitionable.
90 -------------------------------------------
102 mdadm --assemble --force ....
112 md-mod.start_dirty_degraded=1
116 ------------------
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Dramoops.rst9 ------------
17 ----------------
29 Typically the default value of ``mem_type=0`` should be used as that sets the pstore
36 which enables full cache on it. This can improve the performance.
60 ----------------------
68 the kernel to use only the first 128 MB of memory, and place ECC-protected
74 ``Documentation/devicetree/bindings/reserved-memory/ramoops.yaml``.
77 reserved-memory {
78 #address-cells = <2>;
79 #size-cells = <2>;
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Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
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/Documentation/networking/
Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
39 than the CPU's L1/L2 cache, 2) because it allows more queueing in the
44 ring-buffers for various performance reasons, and packets stalling
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
54 # ethtool -C ethX rx-usecs 30
72 * add_device DEVICE@NAME -- adds a single device
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Dip-sysctl.rst1 .. SPDX-License-Identifier: GPL-2.0
10 ip_forward - BOOLEAN
11 - 0 - disabled (default)
12 - not 0 - enabled
20 ip_default_ttl - INTEGER
25 ip_no_pmtu_disc - INTEGER
27 fragmentation-required ICMP is received, the PMTU to this
38 accept fragmentation-needed errors if the underlying protocol
48 Possible values: 0-3
52 min_pmtu - INTEGER
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/Documentation/filesystems/
Daffs.rst1 .. SPDX-License-Identifier: GPL-2.0
19 in file names are case-insensitive, as they ought to be.
24 DOS\4 The original filesystem with directory cache. The directory
25 cache speeds up directory accesses on floppies considerably,
29 DOS\5 The Fast File System with directory cache. Supported read only.
48 This sets the owner of all files and directories in the file
55 Sets the mode flags to the given (octal) value, regardless
66 Sets the number of reserved blocks at the start of the
71 Sets the block number of the root block. This should never
75 Sets the blocksize to blksize. Valid block sizes are 512,
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Ddax.rst6 ----------
8 The page cache is usually used to buffer reads and writes to files.
12 For block devices that are memory-like, the page cache pages would be
19 -----
30 ------------------------------
32 When mounting the filesystem, use the ``-o dax`` option on the command line or
34 within the filesystem. It is equivalent to the ``-o dax=always`` behavior below.
38 ----------------------------
41 -------
43 1. There exists an in-kernel file access mode flag `S_DAX` that corresponds to
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Dgfs2-glocks.rst1 .. SPDX-License-Identifier: GPL-2.0
13 2. A non-blocking bit lock, GLF_LOCK, which is used to prevent other
41 with cache management. The following rules apply for the cache:
44 Glock mode Cache Metadata Cache data Dirty Data Dirty Metadata
62 go_xmote_bh Called after remote state change (e.g. to refill cache)
63 go_inval Called if remote state change requires invalidating the cache
118 5. Transaction glock (via gfs2_trans_begin) for non-read operations
126 is on a per-inode basis. Locking of rgrps is on a per rgrp basis.
130 ----------------
132 The stats are divided into two sets: those relating to the
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Df2fs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 WHAT IS Flash-Friendly File System (F2FS)?
7 NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have
13 F2FS is a file system exploiting NAND flash memory-based storage devices, which
14 is based on Log-structured File System (LFS). The design has been focused on
18 Since a NAND flash memory-based storage device shows different characteristic
20 F2FS and its tools support various parameters not only for configuring on-disk
26 - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git
30 - linux-f2fs-devel@lists.sourceforge.net
34 - https://bugzilla.kernel.org/enter_bug.cgi?product=File%20System&component=f2fs
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/Documentation/mm/
Dslub.rst18 slabs that have data in them. See "slabinfo -h" for more options when
22 gcc -o slabinfo tools/mm/slabinfo.c
30 -------------------------------------------
35 slab_debug=<Debug-Options>
38 slab_debug=<Debug-Options>,<slab name1>,<slab name2>,...
55 A Enable failslab filter mark for the cache
58 - Switch all debugging off (useful if the kernel is
65 Trying to find an issue in the dentry cache? Try::
69 to only enable debugging on the dentry cache. You may use an asterisk at the
71 example, here's how you can poison the dentry cache as well as all kmalloc
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/Documentation/admin-guide/device-mapper/
Dvdo-design.rst1 .. SPDX-License-Identifier: GPL-2.0-only
4 Design of dm-vdo
7 The dm-vdo (virtual data optimizer) target provides inline deduplication,
8 compression, zero-block elimination, and thin provisioning. A dm-vdo target
12 production environments ever since. It was made open-source in 2017 after
14 dm-vdo. For usage, see vdo.rst in the same directory as this file.
25 The design of dm-vdo is based on the idea that deduplication is a two-part
27 storing multiple copies of those duplicates. Therefore, dm-vdo has two main
34 -------------------
41 design attempts to be lock-free.
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Ddm-raid.rst2 dm-raid
5 The device-mapper RAID (dm-raid) target provides a bridge from DM to MD.
6 It allows the MD RAID drivers to be accessed using a device-mapper
11 -----------------------
26 - Transitory layout
29 - rotating parity 0 with data continuation
32 - rotating parity N with data continuation
35 - rotating parity 0 with data restart
38 - rotating parity N with data restart
41 - rotating parity zero (left-to-right) with data restart
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/Documentation/admin-guide/blockdev/
Dfloppy.rst19 Example: If your kernel is called linux-2.6.9, type the following line
22 linux-2.6.9 floppy=thinkpad
25 of linux-2.6.9::
31 linux-2.6.9 floppy=daring floppy=two_fdc
56 in a configuration file in /etc/modprobe.d/.
62 Sets the bit mask to allow only units 0 and 1. (default)
96 and is thus harder to find, whereas non-dma buffers may be
104 If you have a FIFO-able FDC, the floppy driver automatically
105 falls back on non DMA mode if no DMA-able memory can be found.
121 Sets the FIFO threshold. This is mostly relevant in DMA
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/Documentation/admin-guide/mm/
Dnuma_memory_policy.rst10 supported platforms with Non-Uniform Memory Access architectures since 2.4.?.
16 (``Documentation/admin-guide/cgroup-v1/cpusets.rst``)
19 programming interface that a NUMA-aware application can take advantage of. When
28 ------------------------
41 not to overload the initial boot node with boot-time
45 this is an optional, per-task policy. When defined for a
55 to establish the task policy for a child task exec()'d from an
61 In a multi-threaded task, task policies apply only to the thread
98 mapping-- i.e., at Copy-On-Write.
101 virtual address space--a.k.a. threads--independent of when
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/Documentation/arch/x86/
Dsva.rst1 .. SPDX-License-Identifier: GPL-2.0
19 application page-faults. For more information please refer to the PCIe
24 to cache translations for virtual addresses. The IOMMU driver uses the
25 mmu_notifier() support to keep the device TLB cache and the CPU cache in
34 Unlike Single Root I/O Virtualization (SR-IOV), Scalable IOV (SIOV) permits
40 ID (PASID), which is a 20-bit number defined by the PCIe SIG.
43 IOMMU to track I/O on a per-PASID granularity in addition to using the PCIe
55 ENQCMD works with non-posted semantics and carries a status back if the
67 A new thread-scoped MSR (IA32_PASID) provides the connection between
69 accesses an SVA-capable device, this MSR is initialized with a newly
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/Documentation/sound/cards/
Dsb-live-mixer.rst19 (index 0) for a given card) allows to forward 48kHz, stereo, 16-bit
22 to 8 raw PCM devices operating at 48kHz, 16-bit little endian. It would
24 but the conversion routines exist only for stereo (2-channel streams)
34 functionality. Only the default built-in code in the ALSA driver is described
48 one-way three wire serial bus for digital sound by Philips Semiconductors
49 (this standard is used for connecting standalone D/A and A/D converters)
53 a chip containing an analog mixer, D/A and A/D converters
56 FX-bus
63 ---------------------------------------
64 This control is used to attenuate samples from left and right PCM FX-bus
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/Documentation/admin-guide/cgroup-v1/
Dmemory.rst18 we call it "memory cgroup". When you see git-log and source code, you'll
30 Memory-hungry applications can be isolated and limited to a smaller
36 d. A CD/DVD burner could control the amount of memory used by the
42 Current Status: linux-2.6.34-mmotm(development version of 2010/April)
46 - accounting anonymous pages, file caches, swap caches usage and limiting them.
47 - pages are linked to per-memcg LRU exclusively, and there is no global LRU.
48 - optionally, memory+swap usage can be accounted and limited.
49 - hierarchical accounting
50 - soft limit
51 - moving (recharging) account at moving a task is selectable.
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/Documentation/trace/
Dftrace.rst2 ftrace - Function Tracer
13 - Written for: 2.6.28-rc2
14 - Updated for: 3.10
15 - Updated for: 4.13 - Copyright 2017 VMware Inc. Steven Rostedt
16 - Converted to rst format - Changbin Du <changbin.du@intel.com>
19 ------------
24 performance issues that take place outside of user-space.
41 ----------------------
43 See Documentation/trace/ftrace-design.rst for details for arch porters and such.
47 ---------------
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/Documentation/admin-guide/hw-vuln/
Dcore-scheduling.rst1 .. SPDX-License-Identifier: GPL-2.0
15 ----------------
16 A cross-HT attack involves the attacker and victim running on different Hyper
18 full mitigation of cross-HT attacks is to disable Hyper Threading (HT). Core
19 scheduling is a scheduler feature that can mitigate some (not all) cross-HT
21 user-designated trusted group can share a core. This increase in core sharing
27 core involves additional overhead - especially when the system is lightly
29 scheduling to perform more poorly compared to SMT-disabled, where N_CPUS is the
33 -----
35 Using this feature, userspace defines groups of tasks that can be co-scheduled
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/Documentation/core-api/
Ddma-api-howto.rst10 with example pseudo-code. For a concise description of the API, see
11 Documentation/core-api/dma-api.rst.
39 supports 64-bit addresses for main memory and PCI BARs, it may use an IOMMU
40 so devices only need to use 32-bit DMA addresses.
49 +-------+ +------+ +------+
52 C +-------+ --------> B +------+ ----------> +------+ A
54 +-----+ | | | | bridge | | +--------+
55 | | | | +------+ | | | |
58 +-----+ +-------+ +------+ +------+ +--------+
60 X +-------+ --------> Y +------+ <---------- +------+ Z
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/Documentation/bpf/
Dverifier.rst32 After kernel function call, R1-R5 are reset to unreadable and
35 Since R6-R9 are callee saved, their state is preserved across the call.
72 stack bounds, which are [-MAX_BPF_STACK, 0). In this example offset is 8,
78 Classic BPF verifier does similar check with M[0-15] memory slots.
81 bpf_ld R0 = *(u32 *)(R10 - 4)
85 Though R10 is correct read-only register and has type PTR_TO_STACK
86 and R10 - 4 is within stack bounds, there were no stores into that location.
88 Pointer register spill/fill is tracked as well, since four (R6-R9)
91 Allowed function calls are customized with bpf_verifier_ops->get_func_proto()
137 skb->data.
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/Documentation/userspace-api/media/dvb/
Dfe_property_parameters.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
15 .. _DTV-UNDEFINED:
24 .. _DTV-TUNE:
29 Interpret the cache of data, build either a traditional frontend
33 .. _DTV-CLEAR:
38 Reset a cache of data specific to the frontend here. This does not
42 .. _DTV-FREQUENCY:
57 of the transponder/channel. The exception is for ISDB-T, where
60 #. For ISDB-T, the channels are usually transmitted with an offset of
65 #. In ISDB-Tsb, the channel consists of only one or three segments the
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/Documentation/admin-guide/sysctl/
Dnet.rst9 - Terrehon Bowden <terrehon@pacbell.net>
10 - Bodo Bauer <bb@ricochet.net>
14 - Jorge Nerin <comandante@zaralinux.com>
18 - Shen Feng <shen@cn.fujitsu.com>
22 ------------------------------------------------------------------------------
47 1. /proc/sys/net/core - Network core options
51 --------------
63 - x86_64
64 - x86_32
65 - arm64
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