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/Documentation/devicetree/bindings/gpio/
Dnetxbig-gpio-ext.txt5 - compatible: "lacie,netxbig-gpio-ext".
6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
8 - enable-gpio: latches the new configuration (address, data) on raising edge.
12 netxbig_gpio_ext: netxbig-gpio-ext {
13 compatible = "lacie,netxbig-gpio-ext";
15 addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
18 data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
21 enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
/Documentation/devicetree/bindings/rtc/
Dmoxa,moxart-rtc.txt1 MOXA ART real-time clock
5 - compatible : Should be "moxa,moxart-rtc"
6 - rtc-sclk-gpios : RTC sclk gpio, with zero flags
7 - rtc-data-gpios : RTC data gpio, with zero flags
8 - rtc-reset-gpios : RTC reset gpio, with zero flags
13 compatible = "moxa,moxart-rtc";
14 rtc-sclk-gpios = <&gpio 5 0>;
15 rtc-data-gpios = <&gpio 6 0>;
16 rtc-reset-gpios = <&gpio 7 0>;
/Documentation/devicetree/bindings/fsi/
Dfsi-master-gpio.txt1 Device-tree bindings for gpio-based FSI master driver
2 -----------------------------------------------------
5 - compatible = "fsi-master-gpio";
6 - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock
7 - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal
10 - enable-gpios = <gpio-descriptor>; : GPIO for enable signal
11 - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable
12 - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other
14 - no-gpio-delays; : Don't add extra delays between GPIO
21 fsi-master {
[all …]
Dfsi-master-ast-cf.txt1 Device-tree bindings for ColdFire offloaded gpio-based FSI master driver
2 ------------------------------------------------------------------------
5 - compatible =
6 "aspeed,ast2400-cf-fsi-master" for an AST2400 based system
8 "aspeed,ast2500-cf-fsi-master" for an AST2500 based system
10 - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock
11 - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal
12 - enable-gpios = <gpio-descriptor>; : GPIO for enable signal
13 - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable
14 - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other
[all …]
/Documentation/devicetree/bindings/hwmon/
Dnsa320-mcu.txt5 - compatible : "zyxel,nsa320-mcu"
6 - data-gpios : The GPIO pin connected to the data line on the MCU
7 - clk-gpios : The GPIO pin connected to the clock line on the MCU
8 - act-gpios : The GPIO pin connected to the active line on the MCU
13 compatible = "zyxel,nsa320-mcu";
14 pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
15 pinctrl-names = "default";
17 data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
18 clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
19 act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
Dsensirion,sht15.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
16 clk-gpios:
19 data-gpios:
22 vcc-supply:
26 - compatible
27 - clk-gpios
28 - data-gpios
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/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-4
[all …]
Davia-hx711.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
17 - dout-gpio is the sensor data the sensor responds to the clock
25 - avia,hx711
27 sck-gpios:
[all …]
Dadi,ad7780.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The ad7780 is a sigma-delta analog to digital converter. This driver provides
20 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7170.pdf
22 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7171.pdf
24 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7780.pdf
26 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7781.pdf
31 - adi,ad7170
[all …]
/Documentation/devicetree/bindings/bus/
Dts-nbus.txt4 Systems FPGA on the TS-4600 SoM.
7 - compatible : "technologic,ts-nbus"
8 - #address-cells : must be 1
9 - #size-cells : must be 0
10 - pwms : The PWM bound to the FPGA
11 - ts,data-gpios : The 8 GPIO pins connected to the data lines on the FPGA
12 - ts,csn-gpios : The GPIO pin connected to the csn line on the FPGA
13 - ts,txrx-gpios : The GPIO pin connected to the txrx line on the FPGA
14 - ts,strobe-gpios : The GPIO pin connected to the stobe line on the FPGA
15 - ts,ale-gpios : The GPIO pin connected to the ale line on the FPGA
[all …]
/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert@linux-m68k.org>
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
29 - maxItems: 4
30 - maxItems: 8
[all …]
/Documentation/devicetree/bindings/serio/
Dps2-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Danilo Krummrich <danilokrummrich@dk-develop.de>
14 const: ps2-gpio
16 data-gpios:
18 the gpio used for the data signal - this should be flagged as
20 from <dt-bindings/gpio/gpio.h> since the signal is open drain by
24 clk-gpios:
[all …]
/Documentation/devicetree/bindings/iio/resolver/
Dadi,ad2s1210.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD2S1210 Resolver-to-Digital Converter
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
14 resolver-to-digital converter, integrating an on-board programmable
19 angular velocity data directly from the parallel outputs or through
23 selected by the A0 and A1 input pins. In normal mode, data is latched by
25 data is read or written using a register access scheme (address byte with
[all …]
/Documentation/devicetree/bindings/sound/
Dcs53l30.txt5 - compatible : "cirrus,cs53l30"
7 - reg : the I2C address of the device
9 - VA-supply, VP-supply : power supplies for the device,
14 - reset-gpios : a GPIO spec for the reset pin.
16 - mute-gpios : a GPIO spec for the MUTE pin. The active state can be either
20 - cirrus,micbias-lvl : Set the output voltage level on the MICBIAS Pin.
21 0 = Hi-Z
25 - cirrus,use-sdout2 : This is a boolean property. If present, it indicates
27 pins to output data. Otherwise, it indicates that
28 only SDOUT1 is connected for data output.
[all …]
Drealtek,rt5645.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
35 - $ref: dai-common.yaml#
40 - realtek,rt5645
41 - realtek,rt5650
50 avdd-supply:
53 cpvdd-supply:
56 hp-detect-gpios:
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Drealtek,rt5659.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
40 - $ref: dai-common.yaml#
45 - realtek,rt5659
46 - realtek,rt5658
57 clock-names:
60 realtek,dmic1-data-pin:
63 - 0 # dmic1 is not used
[all …]
/Documentation/devicetree/bindings/iio/amplifiers/
Dadi,hmc425a.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 ADRF5750 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz
16 https://www.analog.com/media/en/technical-documentation/data-sheets/adrf5740.pdf
18 HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz
19 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf
21 HMC540S 1 dB LSB Silicon MMIC 4-Bit Digital Positive Control Attenuator, 0.1 - 8 GHz
22 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc540s.pdf
[all …]
/Documentation/devicetree/bindings/media/
Dsamsung,s5c73m3.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656)
15 video data busses. The I2C bus is the main control bus and additionally the
31 clock-names:
33 - const: cis_extclk
35 clock-frequency:
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dgalaxycore,gc0308.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
18 - $ref: /schemas/media/video-interface-devices.yaml#
23 - const: galaxycore,gc0308
24 - items:
25 - const: galaxycore,gc0309
26 - const: galaxycore,gc0308
35 reset-gpios:
[all …]
Dovti,ov8858.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo.mondi@ideasonboard.com>
11 - Nicholas Roth <nicholas@rothemail.net>
15 controlled through an I2C-compatible SCCB bus. The sensor transmits images
16 on a MIPI CSI-2 output interface with up to 4 data lanes.
29 clock-names:
32 dvdd-supply:
35 avdd-supply:
[all …]
Disil,isl79987.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intersil ISL79987 Analog to MIPI CSI-2 decoder
10 - Michael Tretter <m.tretter@pengutronix.de>
11 - Marek Vasut <marex@denx.de>
14 The Intersil ISL79987 is an analog to MIPI CSI-2 decoder which is capable of
16 CSI-2 virtual channels, using one MIPI clock lane and 1/2 data lanes.
21 - isil,isl79987
26 reset-gpios:
[all …]
Dst,st-vgxy61.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/st,st-vgxy61.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Benjamin Mugnier <benjamin.mugnier@foss.st.com>
12 - Sylvain Petinot <sylvain.petinot@foss.st.com>
14 description: |-
15 STMicroelectronics VGxy61 family has a CSI-2 output port. CSI-2 output is a
19 - VG5661 and VG6661 are 1.6 Mpx (1464 x 1104) monochrome and color sensors.
21 - VG5761 and VG6761 are 2.3 Mpx (1944 x 1204) monochrome and color sensors.
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinay Simha BN <simhavcs@gmail.com>
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
25 - toshiba,tc358765
26 - toshiba,tc358775
32 vdd-supply:
[all …]
/Documentation/driver-api/gpio/
Dboard.rst5 This document explains how GPIOs can be assigned to given devices and functions.
9 Kconfig. Then, how GPIOs are mapped depends on what the platform uses to
11 tree, ACPI, and platform data.
14 -----------
15 GPIOs can easily be mapped to devices and functions in the device tree. The
16 exact way to do it depends on the GPIO controller providing the GPIOs, see the
19 GPIOs mappings are defined in the consumer device's node, in a property named
20 <function>-gpios, where <function> is the function the driver will request
26 led-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>, /* red */
30 power-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
[all …]
/Documentation/devicetree/bindings/w1/
Dw1-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bitbanged GPIO 1-Wire Bus
10 - Daniel Mack <zonque@gmail.com>
14 const: w1-gpio
16 gpios:
19 - description: Data I/O pin
20 - description: Enable pin for an external pull-up resistor
[all …]

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