Searched full:ddr50 (Results 1 – 7 of 7) sorted by relevance
| /Documentation/devicetree/bindings/mmc/ |
| D | sdhci-omap.txt | 19 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
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| D | sdhci-st.txt | 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
109 sd-uhs-ddr50;
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| D | sdhci-am654.yaml | 103 ti,otap-del-sel-ddr50:
104 description: Output tap delay for SD UHS DDR50 timing
161 ti,itap-del-sel-ddr50:
162 description: Input tap delay for MMC DDR50 timing
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| D | cdns,sdhci.yaml | 69 cdns,phy-input-delay-sd-uhs-ddr50:
70 description: Value of the delay in the input path for SD UHS DDR50 timing
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| D | brcm,sdhci-brcmstb.yaml | 93 sd-uhs-ddr50;
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| D | mmc-controller.yaml | 160 sd-uhs-ddr50:
163 SD UHS DDR50 speed is supported.
348 "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
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| D | samsung,exynos-dw-mshc.yaml | 166 sd-uhs-ddr50;
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