Searched +full:device +full:- +full:width (Results 1 – 25 of 216) sorted by relevance
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| /Documentation/devicetree/bindings/ata/ |
| D | cavium-compact-flash.txt | 3 The Cavium Compact Flash device is connected to the Octeon Boot Bus,
4 and is thus a child of the Boot Bus device. It can read and write
8 - compatible: "cavium,ebt3000-compact-flash";
12 - reg: The base address of the CF chip select banks. Depending on
13 the device configuration, there may be one or two banks.
15 - cavium,bus-width: The width of the connection to the CF devices. Valid
18 - cavium,true-ide: Optional, if present the CF connection is in True IDE mode.
20 - cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected
21 to this device.
24 compact-flash@5,0 {
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| /Documentation/devicetree/bindings/mtd/ |
| D | mtd-physmap.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
24 - enum:
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| D | orion-nand.txt | 4 - compatible : "marvell,orion-nand".
5 - reg : Base physical address of the NAND and length of memory mapped
9 - cle : Address line number connected to CLE. Default is 0
10 - ale : Address line number connected to ALE. Default is 1
11 - bank-width : Width in bytes of the device. Default is 1
12 - chip-delay : Chip dependent delay for transferring data from array to read
15 The device tree may optionally contain sub-nodes describing partitions of the
21 #address-cells = <1>;
22 #size-cells = <1>;
25 bank-width = <1>;
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| D | gpio-control-nand.txt | 8 - compatible : "gpio-control-nand"
9 - reg : should specify localbus chip select and size used for the chip. The
12 - #address-cells, #size-cells : Must be present if the device has sub-nodes
14 - gpios : Specifies the GPIO pins to control the NAND device. The order of
18 - bank-width : Width (in bytes) of the device. If not present, the width
20 - chip-delay : chip dependent delay for transferring data from array to
22 - gpio-control-nand,io-sync-reg : A 64-bit physical address for a read
28 The device tree may optionally contain sub-nodes describing partitions of the
33 gpio-nand@1,0 {
34 compatible = "gpio-control-nand";
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| D | nxp-spifi.txt | 4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
19 - resets : phandle + reset specifier
22 compatible property as specified in bindings/mtd/jedec,spi-nor.txt
25 - spi-cpol : Controller only supports mode 0 and 3 so either
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| D | flctl-nand.txt | 4 - compatible : "renesas,shmobile-flctl-sh7372"
5 - reg : Address range of the FLCTL
6 - interrupts : flste IRQ number
7 - nand-bus-width : bus width to NAND chip
10 - dmas: DMA specifier(s)
11 - dma-names: name for each DMA specifier. Valid names are
17 The device tree may optionally contain sub-nodes describing partitions of the
23 #address-cells = <1>;
24 #size-cells = <1>;
25 compatible = "renesas,shmobile-flctl-sh7372";
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| /Documentation/devicetree/bindings/misc/ |
| D | xlnx,sd-fec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cvetic, Dragan <dragan.cvetic@amd.com>
11 - Erim, Salih <salih.erim@amd.com>
15 which provides high-throughput LDPC and Turbo Code implementations.
17 customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
23 const: xlnx,sd-fec-1.1
33 - description: Main processing clock for processing core
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ti-aemif.txt | 1 * Device tree bindings for Texas instruments AEMIF controller
4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
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| D | atmel,ebi.txt | 1 * Device tree bindings for Atmel EBI
5 The EBI provides a glue-less interface to asynchronous memories through the SMC
10 - compatible: "atmel,at91sam9260-ebi"
11 "atmel,at91sam9261-ebi"
12 "atmel,at91sam9263-ebi0"
13 "atmel,at91sam9263-ebi1"
14 "atmel,at91sam9rl-ebi"
15 "atmel,at91sam9g45-ebi"
16 "atmel,at91sam9x5-ebi"
17 "atmel,sama5d3-ebi"
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - elpida,ECB240ABACN
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| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-enum-framesizes.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_ENUM_FRAMESIZES - Enumerate frame sizes
30 that contains an index and pixel format and receives a frame width
36 This ioctl allows applications to enumerate all frame sizes (i. e. width
37 and height in pixels) that the device supports for the given pixel
44 depend on the type of frame sizes the device supports. Here are the
47 - **Discrete:** The function returns success if the given index value
48 (zero-based) is valid. The application should increase the index by
54 - **Step-wise:** The function returns success if the given index value
60 - **Continuous:** This is a special case of the step-wise type above.
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| D | selection-api-examples.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
7 (A video capture device is assumed; change
14 .. code-block:: c
22 exit(-1);
26 exit(-1);
34 .. code-block:: c
44 exit(-1);
46 r.width = sel.r.width / 2;
48 r.left = sel.r.width / 4;
55 exit(-1);
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| D | crop.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
6 Image Cropping, Insertion and Scaling -- the CROP API
12 <selection-api>`. The new API should be preferred in most cases,
15 equivalent in the SELECTION API. See :ref:`selection-vs-crop` for a
34 device the source is the video signal, and the cropping ioctls determine
40 On a video output device the source are the images passed in by the
47 Source and target rectangles are defined even if the device does not
62 .. _crop-scale:
64 .. kernel-figure:: crop.svg
74 For capture devices the coordinates of the top left corner, width and
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| D | vidioc-subdev-enum-frame-interval.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL - Enumerate frame intervals
35 given sub-device pad. Frame intervals only makes sense for sub-devices
40 on the sub-device output pad depend on the frame format and size on the
45 ``pad``, ``which``, ``code``, ``width`` and ``height`` fields of struct
54 other pads of the sub-device, as well as on the current active links.
58 Sub-devices that support the frame interval enumeration ioctl should
60 multiple pads of the same sub-device is not defined.
66 .. flat-table:: struct v4l2_subdev_frame_interval_enum
67 :header-rows: 0
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| D | ext-ctrls-image-source.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _image-source-controls:
9 The Image Source control class is intended for low-level control of
12 image data out of the device.
15 .. _image-source-control-id:
26 Every line has length of the image width plus horizontal blanking at
28 same sub-device.
54 :c:type:`v4l2_area` provides the width and the height in separate
59 non-sensitive.
64 .. flat-table:: struct v4l2_area
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| D | selection-api-configuration.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
20 :ref:`constraint flags <v4l2-selection-flags>`.
26 See figure :ref:`sel-targets-capture` for examples of the selection
27 targets available for a video capture device. It is recommended to
30 The range of coordinates of the top left corner, width and height of
36 The top left corner, width and height of the source rectangle, that is
43 Each capture device has a default source rectangle, given by the
52 must be located at position ``(0,0)``. The width and height are equal to
63 :ref:`constraint flags <v4l2-selection-flags>`.
92 point ``(0,0)``. The width and height is equal to the image size
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| /Documentation/devicetree/bindings/dma/xilinx/ |
| D | xlnx,zynqmp-dma-1.0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory to device and device to memory transfers. It also has flow
15 - Michael Tretter <m.tretter@pengutronix.de>
16 - Harini Katakam <harini.katakam@amd.com>
17 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
20 - $ref: ../dma-controller.yaml#
23 "#dma-cells":
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| /Documentation/devicetree/bindings/media/xilinx/ |
| D | video.txt | 2 -------------------------------------
8 Each video IP core is represented by an AMBA bus child node in the device
10 cores are represented as defined in ../video-interfaces.txt.
12 The whole pipeline is represented by an AMBA bus child node in the device
16 -----------------
20 - xlnx,video-format: This property represents a video format transmitted on an
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
25 - xlnx,video-width: This property qualifies the video format with the sample
26 width expressed as a number of bits per pixel component. All components must
27 use the same width.
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| /Documentation/devicetree/bindings/clock/ |
| D | xgene.txt | 1 Device Tree Clock bindings for APM X-Gene
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
17 - reg : shall be the physical PLL register address for the pll clock.
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 1 Device tree bindings for NVIDIA Tegra Generic Memory Interface bus
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
30 Chip select used by the device.
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| /Documentation/devicetree/bindings/media/ |
| D | ti,da850-vpif.txt | 2 ----------------------
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
25 Example using 2 8-bit input channels, one of which is connected to an
26 I2C-connected TVP5147 decoder:
29 compatible = "ti,da850-vpif";
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| /Documentation/admin-guide/media/ |
| D | mgb4.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 ---------------
11 device can be opened) and obtain the video device/stream status.
13 There are two types of parameters - global / PCI card related, found under
14 ``/sys/class/video4linux/videoX/device`` and module specific found under
23 | 0 - No module present
24 | 1 - FPDL3
25 | 2 - GMSL
33 | 1 - FPDL3
34 | 2 - GMSL
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 This document defines device tree properties common to several classes of
15 display panels. It doesn't constitute a device tree binding specification by
16 itself but is meant to be referenced by device tree bindings.
18 When referenced from panel device tree bindings the properties defined in this
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | synopsys,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This document defines device tree properties for the Synopsys DesignWare HDMI
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
15 binding specification by itself but is meant to be referenced by device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
18 When referenced from platform device tree bindings the properties defined in
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