Searched +full:dt +full:- +full:binding (Results 1 – 25 of 269) sorted by relevance
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| /Documentation/devicetree/bindings/ |
| D | submitting-patches.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Submitting Devicetree (DT) binding patches
11 Documentation/process/submitting-patches.rst applies.
13 1) The Documentation/ and include/dt-bindings/ portion of the patch should
14 be a separate patch. The preferred subject prefix for binding patches is::
16 "dt-bindings: <binding dir>: ..."
21 "<binding dir>: dt-bindings: ..."
25 docs. Repeating "binding" again should also be avoided.
27 2) DT binding files are written in DT schema format using json-schema
28 vocabulary and YAML file format. The DT binding files must pass validation
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| D | writing-schema.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 Writing Devicetree Bindings in json-schema
6 Devicetree bindings are written using json-schema vocabulary. Schema files are
7 written in a JSON-compatible subset of YAML. YAML is used instead of JSON as it
11 Also see :ref:`example-schema`.
14 ---------------
16 Each schema doc is a structured json-schema which is defined by a set of
17 top-level properties. Generally, there is one binding defined per file. The
18 top-level json-schema properties used are:
21 A json-schema unique identifier string. The string must be a valid
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| D | ABI.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Devicetree (DT) ABI
7 I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit
10 "That still leaves the question of, what does a stable binding look
11 like? Certainly a stable binding means that a newer kernel will not
12 break on an older device tree, but that doesn't mean the binding is
15 then default to the previous behaviour if it is missing. If a binding
21 II. General binding rules
24 binding because it isn't perfect.
30 the old binding. ie. add additional properties, but don't change the
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 DT_DOC_CHECKER ?= dt-doc-validate
3 DT_EXTRACT_EX ?= dt-extract-example
4 DT_MK_SCHEMA ?= dt-mk-schema
19 $(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -Vc >/dev/null || \
28 find_all_cmd = find $(src) \( -name '*.yaml' ! \
29 -name 'processed-schema*' \)
33 grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | \
39 xargs -n200 -P$$(nproc) \
40 $(DT_SCHEMA_LINT) -f parsable -c $(src)/.yamllint >&2) \
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| /Documentation/devicetree/bindings/iommu/ |
| D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
35 +----------------+-------
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | dra7-atl.txt | 7 signals - can compensate the drift between the two ws signal.
12 Clock tree binding:
13 This binding uses the common clock binding[1].
14 To be able to integrate the ATL clocks with DT clock tree.
16 Since the clock instances are part of a single IP this binding is used as a node
17 for the DT clock tree, the IP driver is needed to handle the actual configuration
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
23 - compatible : shall be "ti,dra7-atl-clock"
24 - #clock-cells : from common clock binding; shall be set to 0.
25 - clocks : link phandles to functional clock of ATL
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| /Documentation/devicetree/bindings/clock/ |
| D | maxim,max77686.txt | 1 Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block
4 multi-function device. More information can be found in MFD DT binding
12 dt-bindings/clock/maxim,max77686.h.
17 dt-bindings/clock/maxim,max77802.h.
21 dt-bindings/clock/maxim,max77620.h.
27 - #clock-cells: from common clock binding; shall be set to 1.
30 - clock-output-names: From common clock binding.
34 - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620)
35 - 1: 32khz_cp clock (max77686, max77802),
36 - 2: 32khz_pmic clock (max77686).
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| D | alphascale,acc.txt | 7 - compatible: must be "alphascale,asm9260-clock-controller"
8 - reg: must contain the ACC register base and size
9 - #clock-cells : shall be set to 1.
11 Simple one-cell clock specifier format is used, where the only cell is used
13 It is encouraged to use dt-binding for clock index definitions. SoC specific
14 dt-binding should be included to the device tree descriptor. For example
16 #include <dt-bindings/clock/alphascale,asm9260.h>
18 This binding contains two types of clock providers:
19 _AHB_ - AHB gate;
20 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
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| D | img,boston-clock.txt | 1 Binding for Imagination Technologies MIPS Boston clock sources.
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - compatible : Should be "img,boston-clock".
12 - #clock-cells : Should be set to 1.
14 <dt-bindings/clock/boston-clock.h>
18 system-controller@17ffd000 {
19 compatible = "img,boston-platform-regs", "syscon";
23 compatible = "img,boston-clock";
24 #clock-cells = <1>;
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| D | clk-palmas-clk32kg-clocks.txt | 5 This binding uses the common clock binding ./clock-bindings.txt.
8 - compatible : "ti,palmas-clk32kg" for clk32kg clock
9 "ti,palmas-clk32kgaudio" for clk32kgaudio clock
10 - #clock-cells : shall be set to 0.
13 - ti,external-sleep-control: The external enable input pins controlled the
22 dt-bindings/mfd/palmas.h
25 #include <dt-bindings/mfd/palmas.h>
30 compatible = "ti,palmas-clk32kg";
31 #clock-cells = <0>;
32 ti,external-sleep-control = <PALMAS_EXT_CONTROL_PIN_NSLEEP>;
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| D | maxim,max9485.txt | 5 - MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 MHz
6 - MAX9485_CLKOUT: A PLL that can be configured to 16 different discrete
8 - MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT
14 - compatible: "maxim,max9485"
15 - clocks: Input clock, must provide 27.000 MHz
16 - clock-names: Must be set to "xclk"
17 - #clock-cells: From common clock binding; shall be set to 1
20 - reset-gpios: GPIO descriptor connected to the #RESET input pin
21 - vdd-supply: A regulator node for Vdd
22 - clock-output-names: Name of output clocks, as defined in common clock
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| D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
21 This binding document describes the binding for the clock portion of the
24 Also see these documents for generic binding information:
25 [1] Clock : ../clock/clock-bindings.txt
28 [2] include/dt-bindings/clock/lochnagar.h
30 This binding must be part of the Lochnagar MFD binding:
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| D | brcm,bcm2835-aux-clock.txt | 3 This binding uses the common clock binding:
4 Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - compatible: Should be "brcm,bcm2835-aux"
12 - #clock-cells: Should be <1>. The permitted clock-specifier values can be
13 found in include/dt-bindings/clock/bcm2835-aux.h
14 - reg: Specifies base physical address and size of the registers
15 - clocks: The parent clock phandle
20 compatible = "brcm,bcm2835-cprman";
21 #clock-cells = <1>;
27 compatible = "brcm,bcm2835-aux";
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| D | ti-clkctrl.txt | 1 Texas Instruments clkctrl clock binding
15 For more information, please see the Linux clock framework binding at
16 Documentation/devicetree/bindings/clock/clock-bindings.txt.
19 - compatible : shall be "ti,clkctrl" or a clock domain specific name:
20 "ti,clkctrl-l4-cfg"
21 "ti,clkctrl-l4-per"
22 "ti,clkctrl-l4-secure"
23 "ti,clkctrl-l4-wkup"
24 - clock-output-names : from common clock binding
25 - #clock-cells : shall contain 2 with the first entry being the instance
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| D | clock-bindings.txt | 1 This file has moved to the clock binding schema:
2 https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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| D | fsl,scu-clk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Clock Controller Based on SCU Message Protocol
10 - Abel Vesa <abel.vesa@nxp.com>
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
14 This binding uses the common clock binding.
15 (Documentation/devicetree/bindings/clock/clock-bindings.txt)
18 include/dt-bindings/clock/imx8qxp-clock.h
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| D | st,stm32mp1-rcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 Please also refer to reset.txt for common reset controller binding usage.
17 This binding uses common clock bindings
18 Documentation/devicetree/bindings/clock/clock-bindings.txt
24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
43 include/dt-bindings/reset-controller/stm32mp1-resets.h
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| D | microchip,pic32.txt | 1 Microchip PIC32 Clock Controller Binding
2 ----------------------------------------
6 This binding uses common clock bindings.
7 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
10 - compatible: shall be "microchip,pic32mzda-clk".
11 - reg: shall contain base address and length of clock registers.
12 - #clock-cells: shall be 1.
15 - microchip,pic32mzda-sosc: shall be added only if platform has
19 rootclk: clock-controller@1f801200 {
20 compatible = "microchip,pic32mzda-clk";
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| /Documentation/devicetree/bindings/reset/ |
| D | snps,hsdk-reset.txt | 1 Binding for the Synopsys HSDK reset controller
3 This binding uses the common reset binding[1].
8 - compatible: should be "snps,hsdk-reset".
9 - reg: should always contain 2 pairs address - length: first for reset
12 - #reset-cells: from common reset binding; Should always be set to 1.
16 compatible = "snps,hsdk-reset";
17 #reset-cells = <1>;
28 The index could be found in <dt-bindings/reset/snps,hsdk-reset.h>
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| D | reset.txt | 3 This binding is intended to represent the hardware reset signals present
10 reset consumer (the module being reset, or a module managing when a sub-
11 ordinate module is reset). This binding exists to represent the provider and
15 specifier - a list of DT cells that represents the reset signal within the
17 are dictated by the binding of the reset provider, although common schemes
23 the DT node of each affected HW block, since if activated, an unrelated block
24 may be reset. Instead, reset signals should be represented in the DT node
27 block node for dedicated reset signals. The intent of this binding is to give
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
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| /Documentation/devicetree/bindings/thermal/ |
| D | max77620_thermal.txt | 10 -------------------
11 #thermal-sensor-cells: For more details, please refer to
12 <devicetree/bindings/thermal/thermal-sensor.yaml>
15 For more details, please refer generic thermal DT binding document
18 Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
22 --------
23 #include <dt-bindings/mfd/max77620.h>
24 #include <dt-bindings/thermal/thermal.h>
31 #thermal-sensor-cells = <0>;
36 cool_dev: cool-dev {
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| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,padding.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
24 - mediatek,mt8188-disp-padding
25 - mediatek,mt8195-mdp3-padding
30 power-domains:
35 - description: Padding's clocks
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| /Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra186-bpmp-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 binding describes an I2C bus that is accessed in such a fashion.
21 See ../firmware/nvidia,tegra186-bpmp.yaml for details of the BPMP
22 binding.
28 const: nvidia,tegra186-bpmp-i2c
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-max77620.txt | 7 -------------------
8 - gpio-controller : Marks the device node as a gpio controller.
9 - #gpio-cells : Should be two. The first cell is the pin number and
13 For more details, please refer generic GPIO DT binding document
17 --------
18 #include <dt-bindings/mfd/max77620.h>
23 gpio-controller;
24 #gpio-cells = <2>;
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| /Documentation/devicetree/bindings/net/bluetooth/ |
| D | ti,bluetooth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Lechner <david@lechnology.com>
13 This documents the binding structure and common properties for serial
15 binding:
27 This bindings follows the UART slave device binding in ../serial/serial.yaml.
32 - ti,cc2560
33 - ti,wl1271-st
34 - ti,wl1273-st
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