Searched +full:dt +full:- +full:node (Results 1 – 25 of 705) sorted by relevance
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| /Documentation/devicetree/bindings/clock/ |
| D | maxim,max77686.txt | 4 multi-function device. More information can be found in MFD DT binding
12 dt-bindings/clock/maxim,max77686.h.
17 dt-bindings/clock/maxim,max77802.h.
21 dt-bindings/clock/maxim,max77620.h.
23 Following properties should be presend in main device node of the MFD chip.
27 - #clock-cells: from common clock binding; shall be set to 1.
30 - clock-output-names: From common clock binding.
34 - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620)
35 - 1: 32khz_cp clock (max77686, max77802),
36 - 2: 32khz_pmic clock (max77686).
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| D | canaan,k210-clk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
14 controller node must be defined as a child node of the K210
15 system controller node.
18 - dt-bindings/clock/k210-clk.h
22 const: canaan,k210-clk
27 Phandle of the SoC 26MHz fixed-rate oscillator clock.
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| D | amlogic,meson8b-clkc.txt | 8 - compatible: must be one of:
9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
14 - clocks: list of clock phandles, one for each entry in clock-names
15 - clock-names: should contain the following:
20 Parent node should have the following properties :
21 - compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
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| /Documentation/devicetree/ |
| D | usage-model.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 The "Open Firmware Device Tree", or simply Devicetree (DT), is a data
23 Structurally, the DT is a tree, or acyclic graph with named nodes, and
26 links from one node to another outside of the natural tree structure.
34 maximize use of existing support code, but since property and node
44 ----------
45 The DT was originally created by Open Firmware as part of the
56 In 2005, when PowerPC Linux began a major cleanup and to merge 32-bit
57 and 64-bit support, the decision was made to require DT support on all
59 Firmware. To do this, a DT representation called the Flattened Device
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| /Documentation/devicetree/bindings/power/ |
| D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
18 Power domains contained within power-controller node are
20 Documentation/devicetree/bindings/power/power-domain.yaml.
23 "power-domains" property that is a phandle for the
24 power domain node representing the domain.
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| D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
17 IP cores belonging to a power domain should contain a 'power-domains'
18 property that is a phandle for SCPSYS node representing the domain.
22 pattern: '^power-controller(@[0-9a-f]+)?$'
26 - mediatek,mt6795-power-controller
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| D | fsl,imx-gpcv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
19 described as subnodes of the power gating controller 'pgc' node.
21 IP cores belonging to a power domain should contain a 'power-domains'
22 property that is a phandle for PGC node representing the domain.
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| /Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 This node is a mailbox consumer. See the following files for details
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
28 This node is a clock, power domain, and reset provider. See the
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| /Documentation/devicetree/bindings/reset/ |
| D | canaan,k210-rst.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
15 of the SoC. The K210 reset controller node must be defined as a child
16 node of the K210 system controller node.
19 - dt-bindings/reset/k210-rst.h
23 const: canaan,k210-rst
25 '#reset-cells':
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| D | ti-syscon-reset.txt | 6 typically provided by means of memory-mapped I/O registers. These registers are
8 functionalities. This register range is best represented as a syscon node to
12 A SysCon Reset Controller node defines a device that uses a syscon node
16 SysCon Reset Controller Node
19 node and have the following properties.
22 --------------------
23 - compatible : Should be,
24 "ti,k2e-pscrst"
25 "ti,k2l-pscrst"
26 "ti,k2hk-pscrst"
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| D | reset.txt | 10 reset consumer (the module being reset, or a module managing when a sub-
15 specifier - a list of DT cells that represents the reset signal within the
23 the DT node of each affected HW block, since if activated, an unrelated block
24 may be reset. Instead, reset signals should be represented in the DT node
25 where it makes most sense to control it; this may be a bus node if all
27 block node for dedicated reset signals. The intent of this binding is to give
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
42 #reset-cells = <1>;
51 #reset-cells, then only the phandle portion of the pair will
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| /Documentation/devicetree/bindings/perf/ |
| D | arm,cmn.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Robin Murphy <robin.murphy@arm.com>
16 - arm,cmn-600
17 - arm,cmn-650
18 - arm,cmn-700
19 - arm,cmn-s3
20 - arm,ci-700
24 - description: Physical address of the base (PERIPHBASE) and
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| /Documentation/devicetree/bindings/power/reset/ |
| D | syscon-reboot-mode.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 This driver gets reboot mode magic value from reboot-mode driver
17 parental dt-node plus the offset. So the SYSCON reboot-mode node
18 should be represented as a sub-node of a "syscon", "simple-mfd" node.
22 const: syscon-reboot-mode
33 - $ref: reboot-mode.yaml#
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,gsbi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The GSBI controller is modeled as a node with zero or more child nodes, each
16 representing a serial sub-node device that is mux'd as part of the GSBI
20 A GSBI controller node can contain 0 or more child nodes representing serial
26 const: qcom,gsbi-v1.0.0
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| /Documentation/devicetree/bindings/mfd/ |
| D | canaan,k210-sysctl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
20 - const: canaan,k210-sysctl
21 - const: syscon
22 - const: simple-mfd
29 clock-names:
31 - const: pclk
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| /Documentation/devicetree/bindings/thermal/ |
| D | thermal-zones.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#
6 $schema: http://devicetree.org/meta-schemas/base.yaml#
11 - Daniel Lezcano <daniel.lezcano@linaro.org>
18 The following node types are used to completely describe a thermal management
20 - thermal-sensor: device that measures temperature, has SoC-specific bindings
21 - cooling-device: device used to dissipate heat either passively or actively
22 - thermal-zones: a container of the following node types used to describe all
25 This binding describes the thermal-zones.
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| /Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip,inno-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,inno-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,rk3036-inno-hdmi
17 - rockchip,rk3128-inno-hdmi
28 - description: The HDMI controller main clock
29 - description: The HDMI PHY reference clock
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| D | rockchip,rk3066-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 - $ref: /schemas/sound/dai-common.yaml#
18 const: rockchip,rk3066-hdmi
29 clock-names:
32 power-domains:
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| /Documentation/devicetree/bindings/media/ |
| D | mediatek,mt8195-jpegenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgenc
19 power-domains:
29 "#address-cells":
32 "#size-cells":
37 # Required child node:
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| D | renesas,vin.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
25 - items:
26 - enum:
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| /Documentation/devicetree/bindings/pci/ |
| D | ti-pci.txt | 4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
15 - num-lanes as specified in ../snps,dw-pcie.yaml
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| /Documentation/devicetree/bindings/soc/samsung/ |
| D | exynos-usi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | nwl-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
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| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
16 WDMA device node must be siblings to the central MMSYS_CONFIG node.
24 - enum:
25 - mediatek,mt8173-disp-wdma
26 - items:
27 - const: mediatek,mt6795-disp-wdma
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| /Documentation/devicetree/bindings/net/bluetooth/ |
| D | mediatek,mt7622-bluetooth.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/mediatek,mt7622-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek SoC built-in Bluetooth
11 child node of the serial node with BTIF. The dt-bindings details for BTIF
15 - Sean Wang <sean.wang@mediatek.com>
18 - $ref: bluetooth-controller.yaml#
22 const: mediatek,mt7622-bluetooth
27 clock-names:
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