Searched +full:enable +full:- +full:active +full:- +full:high (Results 1 – 25 of 137) sorted by relevance
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| /Documentation/devicetree/bindings/regulator/ |
| D | gpio-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: regulator.yaml#
22 const: regulator-gpio
24 regulator-name: true
26 enable-gpios:
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| D | fixed-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/fixed-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
16 expected to have the regulator-min-microvolt and regulator-max-microvolt
20 - $ref: regulator.yaml#
21 - if:
25 const: regulator-fixed-clock
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| D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
36 richtek,ld-pulse-delay-us:
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| D | maxim,max8973.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
18 - maxim,max8973
19 - maxim,max77621
21 junction-warn-millicelsius:
30 maxim,dvs-gpio:
35 maxim,dvs-default-state:
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| D | richtek,rt6160-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rt6160-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT6160 is a high-efficiency buck-boost converter that can provide
18 https://www.richtek.com/assets/product_file/RT6160A/DS6160A-00.pdf
21 - $ref: regulator.yaml#
26 - richtek,rt6160
31 enable-gpios:
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| D | richtek,rt5739.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT5739 Step-Down Buck Converter
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT5739 is a step-down switching buck converter that can deliver the
16 capability at over 80% high efficiency.
19 - $ref: regulator.yaml#
24 - richtek,rt5733
25 - richtek,rt5739
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| D | maxim,max20411.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim Integrated MAX20411 Step-Down DC-DC Converter
10 - Bjorn Andersson <andersson@kernel.org>
13 The MAX20411 is a high-efficiency, DC-DC step-down converter. It provides
18 - $ref: regulator.yaml#
27 enable-gpios:
28 description: GPIO connected to the EN pin, active high
30 vdd-supply:
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| /Documentation/devicetree/bindings/rtc/ |
| D | rtc-omap.txt | 4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
19 - clock-names: Corresponding names of the clocks
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
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| D | panel-timing.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Sam Ravnborg <sam@ravnborg.org>
20 +-------+----------+-------------------------------------+----------+
24 +-------+----------+-------------------------------------+----------+
28 +-------+----------#######################################----------+
33 |<----->|<-------->#<-------+--------------------------->#<-------->|
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| /Documentation/devicetree/bindings/serial/ |
| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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| /Documentation/devicetree/bindings/power/reset/ |
| D | atmel,sama5d2-shdwc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - items:
20 - const: microchip,sama7g5-shdwc
21 - const: syscon
22 - enum:
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| /Documentation/devicetree/bindings/clock/ |
| D | idt,versaclock5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - 5P49V5923:
17 0 -- OUT0_SEL_I2CB
18 1 -- OUT1
19 2 -- OUT2
21 - 5P49V5933:
22 0 -- OUT0_SEL_I2CB
23 1 -- OUT1
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 4 external memory. Can be used to attach various high speed devices such as
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
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| /Documentation/devicetree/bindings/serio/ |
| D | ps2-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Danilo Krummrich <danilokrummrich@dk-develop.de>
14 const: ps2-gpio
16 data-gpios:
18 the gpio used for the data signal - this should be flagged as
19 active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)
20 from <dt-bindings/gpio/gpio.h> since the signal is open drain by
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| /Documentation/devicetree/bindings/sound/ |
| D | cirrus,cs35l41.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - david.rhodes@cirrus.com
19 - cirrus,cs35l40
20 - cirrus,cs35l41
28 '#sound-dai-cells':
33 reset-gpios:
36 VA-supply:
39 VP-supply:
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| D | nuvoton,nau8821.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Seven Lee <wtli@nuvoton.com>
13 - $ref: dai-common.yaml#
25 nuvoton,jkdet-enable:
26 description: Enable jack detection via JKDET pin.
29 nuvoton,jkdet-pull-enable:
30 description: Enable JKDET pin pull. If set - pin pull enabled,
31 otherwise pin in high impedance state.
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| /Documentation/devicetree/bindings/hwmon/ |
| D | ti,ina2xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 The INA209 is a high-side current shunt and power monitor with
23 - ti,ina209
24 - ti,ina219
25 - ti,ina220
26 - ti,ina226
27 - ti,ina230
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-lp8860.txt | 1 * Texas Instruments - lp8860 4-Channel LED Driver
3 The LP8860-Q1 is an high-efficiency LED
4 driver with boost controller. It has 4 high-precision
9 - compatible :
11 - reg : I2C slave address
12 - #address-cells : 1
13 - #size-cells : 0
16 - enable-gpios : gpio pin to enable (active high)/disable the device.
17 - vled-supply : LED supply
20 - reg : 0
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| /Documentation/devicetree/bindings/mfd/ |
| D | twl6040.txt | 3 The TWL6040s are 8-channel high quality low-power audio codecs providing audio,
9 - compatible : "ti,twl6040" for twl6040, "ti,twl6041" for twl6041
10 - reg: must be 0x4b for i2c address
11 - interrupts: twl6040 has one interrupt line connecteded to the main SoC
12 - gpio-controller:
13 - #gpio-cells = <1>: twl6040 provides GPO lines.
14 - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM
15 - twl6040,audpwron-gpio: Power on GPIO line for the twl6040
17 - vio-supply: Regulator for the twl6040 VIO supply
18 - v2v1-supply: Regulator for the twl6040 V2V1 supply
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | aptina,mt9v111.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
16 The sensor has an active pixel array of 640x480 pixels and can output a number
17 of image resolutions and formats controllable through a simple two-wires
30 enable-gpios:
31 description: Enable signal, pin name "OE#". Active low.
34 standby-gpios:
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| D | ad5820.txt | 5 - compatible: Must contain one of:
6 - "adi,ad5820"
7 - "adi,ad5821"
8 - "adi,ad5823"
10 - reg: I2C slave address
12 - VANA-supply: supply of voltage for VANA pin
16 - enable-gpios : GPIO spec for the XSHUTDOWN pin. The XSHUTDOWN signal is
17 active low, a high level on the pin enables the device.
25 VANA-supply = <&vaux4>;
26 enable-gpios = <&msmgpio 26 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | brcm,nsp-gpio.txt | 4 - compatible:
5 Must be "brcm,nsp-gpio-a"
7 - reg:
11 - #gpio-cells:
14 bit[0]: polarity (0 for active high and 1 for active low)
16 - gpio-controller:
19 - ngpios:
23 - interrupts:
26 - interrupt-controller:
29 - gpio-ranges:
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| /Documentation/devicetree/bindings/power/supply/ |
| D | maxim,max8903.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 - $ref: power-supply.yaml#
19 dok-gpios:
21 description: Valid DC power has been detected (active low, input)
23 uok-gpios:
25 description: Valid USB power has been detected (active low, input)
27 cen-gpios:
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
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