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/Documentation/devicetree/bindings/edac/
Daspeed-sdram-edac.txt3 The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error
4 correction check).
6 The memory controller supports SECDED (single bit error correction, double bit
7 error detection) and single bit error auto scrubbing by reserving 8 bits for
14 - compatible: should be one of
15 - "aspeed,ast2400-sdram-edac"
16 - "aspeed,ast2500-sdram-edac"
17 - "aspeed,ast2600-sdram-edac"
18 - reg: sdram controller register set should be <0x1e6e0000 0x174>
19 - interrupts: should be AVIC interrupt #0
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Damazon,al-mc-edac.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/edac/amazon,al-mc-edac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Talel Shenhar <talel@amazon.com>
11 - Talel Shenhar <talelshenhar@gmail.com>
14 EDAC node is defined to describe on-chip error detection and correction for
20 const: amazon,al-mc-edac
25 "#address-cells":
28 "#size-cells":
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Ddmc-520.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/edac/dmc-520.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM DMC-520 EDAC
10 - Lei Wang <lewan@microsoft.com>
13 DMC-520 node is defined to describe DRAM error detection and correction.
20 - const: brcm,dmc-520
21 - const: arm,dmc-520
30 interrupt-names:
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Dapm-xgene-edac.txt1 * APM X-Gene SoC EDAC node
3 EDAC node is defined to describe on-chip error detection and correction.
4 The follow error types are supported:
6 memory controller - Memory controller
7 PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
8 L3 - L3 cache controller
9 SoC - SoC IP's such as Ethernet, SATA, and etc
14 - compatible : Shall be "apm,xgene-edac".
15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
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/Documentation/driver-api/
Dmtdnand.rst10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
86 - [BOARDSPECIFIC]
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Dedac.rst1 Error Detection And Correction (EDAC) Devices
5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
48 just one memory stick when an error occurs, as the error correction code
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
63 dimms, accessed at the same time. E. g. if the DIMM is 64 bits-wide (72
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/Documentation/devicetree/bindings/memory-controllers/
Dnuvoton,npcm-memory-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-memory-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marvin Lin <kflin@nuvoton.com>
11 - Stanley Chu <yschu@nuvoton.com>
14 The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction
17 The memory controller supports single bit error correction, double bit error
18 detection (in-line ECC in which a section (1/8th) of the memory device used to
26 - nuvoton,npcm750-memory-controller
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Dnvidia,tegra186-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
16 handles memory requests for 40-bit virtual addresses from internal clients
22 automotive safety applications (single bit error correction and double bit
23 error detection).
27 pattern: "^memory-controller@[0-9a-f]+$"
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/Documentation/core-api/
Dlibrs.rst2 Reed-Solomon Library Programming Interface
10 The generic Reed-Solomon Library provides encoding, decoding and error
11 correction functions.
13 Reed-Solomon codes are used in communication and storage applications to
30 ------------
33 which holds the necessary information for encoding, decoding and error
34 correction with the given polynomial. It either uses an existing
54 --------
56 The encoder calculates the Reed-Solomon code over the given data length
60 The expanded data can be inverted on the fly by providing a non-zero
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/Documentation/userspace-api/media/dvb/
Dfrontend-stat-properties.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _frontend-stat-properties:
32 - ``svalue`` or ``uvalue``, where ``svalue`` is for signed values of
36 - ``scale`` - Scale for the value. It can be:
38 - ``FE_SCALE_NOT_AVAILABLE`` - The parameter is supported by the
42 - ``FE_SCALE_DECIBEL`` - parameter is a signed value, measured in
45 - ``FE_SCALE_RELATIVE`` - parameter is a unsigned value, where 0
48 - ``FE_SCALE_COUNTER`` - parameter is a unsigned value that counts
49 the occurrence of an event, like bit error, block error, or lapsed
53 .. _DTV-STAT-SIGNAL-STRENGTH:
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Ddvb-frontend-parameters.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 per-system parameters. However, as newer delivery systems required more
24 DVB-S2, DVB-T2, DVB-C2, ISDB, etc.
30 .. code-block:: c
61 .. code-block:: c
65 fe_code_rate_t fec_inner; /* forward error correction (see above) */
77 .. code-block:: c
81 fe_code_rate_t fec_inner; /* forward error correction (see above) */
94 .. code-block:: c
106 DVB-T frontends are supported by the ``dvb_ofdm_parameters`` structure:
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/Documentation/devicetree/bindings/arm/altera/
Dsocfpga-sdram-edac.txt1 Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
5 - compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
6 - altr,sdr-syscon : phandle of the sdr module
7 - interrupts : Should contain the SDRAM ECC IRQ in the
12 compatible = "altr,sdram-edac";
13 altr,sdr-syscon = <&sdr>;
/Documentation/admin-guide/RAS/
Dmain.rst1 .. SPDX-License-Identifier: GPL-2.0
37 -------------
48 * Memory – add error correction logic (ECC) to detect and correct errors;
51 Self-Monitoring, Analysis and Reporting Technology (SMART).
53 By monitoring the number of occurrences of error detections, it is possible
59 ---------------
62 Codes that allow error correction when the number of errors on a bit packet
64 can indicate with a high degree of confidence that an error happened, but
67 Also, sometimes an error occur on a component that it is not used. For
72 * **Correctable Error (CE)** - the error detection mechanism detected and
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/Documentation/ABI/testing/
Dsysfs-bus-iio-isl295014 Contact: linux-iio@vger.kernel.org
22 Contact: linux-iio@vger.kernel.org
24 The sensor is able to perform correction of distance
27 a second order error polynomial.
Dsysfs-devices-edac3 Contact: linux-edac@vger.kernel.org
4 Description: This write-only control file will zero all the statistical
14 Contact: linux-edac@vger.kernel.org
16 since the last counter reset. This can be used with the error
17 counters to measure error rates.
21 Contact: linux-edac@vger.kernel.org
27 Contact: linux-edac@vger.kernel.org
33 Contact: linux-edac@vger.kernel.org
41 Contact: linux-edac@vger.kernel.org
48 Contact: linux-edac@vger.kernel.org
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/Documentation/admin-guide/device-mapper/
Dverity.rst2 dm-verity
5 Device-Mapper's "verity" target provides transparent integrity checking of
7 This target is read-only.
21 This is the type of the on-disk hash format.
40 dm-verity device.
55 This is the offset, in <hash_block_size>-blocks, from the start of hash_dev
96 Use forward error correction (FEC) to recover from corruption if hash
110 is M-N.
122 rather than every time. This reduces the overhead of dm-verity so that it
158 dm-verity is meant to be set up as part of a verified boot path. This
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/Documentation/gpu/amdgpu/display/
Ddc-glossary.rst7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
108 Display Micro-Controller Unit
111 Display Micro-Controller Unit, version B
132 Forward Error Correction
225 Transition-Minimized Differential Signaling
/Documentation/driver-api/media/
Ddtv-frontend.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ------------------------
9 The Digital TV Frontend kABI defines a driver-internal interface for
10 registering low-level, hardware specific driver to a hardware independent
29 .name = "foo DVB-T/T2/C driver",
70 .name = "Bar DVB-S/S2 demodulator",
91 /* Satellite-specific */
100 #) For satellite digital TV standards (DVB-S, DVB-S2, ISDB-S), the
129 ``DVBFE_ALGO_SW``, meaning that the dvb-core will do a zigzag when tuning,
131 then, it will do ``f`` + |delta|, ``f`` - |delta|, ``f`` + 2 x |delta|,
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/Documentation/input/joydev/
Djoystick-api.rst1 .. _joystick-api:
7 :Author: Ragnar Hojland Espinosa <ragnar@macula.net> - 7 Aug 1998
18 driver now reports only any changes of its state. See joystick-api.txt,
65 -------------
86 ---------------
108 --------------
110 For an axis, ``value`` is a signed integer between -32767 and +32767
141 -------------
161 b) open the device in non-blocking mode (O_NONBLOCK)
165 ----------
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/Documentation/devicetree/bindings/misc/
Dxlnx,sd-fec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cvetic, Dragan <dragan.cvetic@amd.com>
11 - Erim, Salih <salih.erim@amd.com>
14 The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
15 which provides high-throughput LDPC and Turbo Code implementations.
17 customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
23 const: xlnx,sd-fec-1.1
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/Documentation/devicetree/bindings/reserved-memory/
Dramoops.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/ramoops.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 recovered after a reboot. This is a child-node of "/reserved-memory", and
16 as kernel log messages, or for optional ECC error-correction data. The total
23 At least one of "record-size", "console-size", "ftrace-size", or "pmsg-size"
24 must be set non-zero, but are otherwise optional as listed below.
27 - Kees Cook <keescook@chromium.org>
30 - $ref: reserved-memory.yaml
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/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/
Dcounters.rst1 .. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
13 - `Overview`_
14 - `Groups`_
15 - `Types`_
16 - `Descriptions`_
27 ----------------------------------------
29 ---------------------------------------- ---------------------------------------- |
32 | ------------------- --------------- | | ------------------- --------------- | |
34 | ------------------- --------------- | | ------------------- --------------- | |
36 | ------------------- | | ------------------- | |
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/Documentation/userspace-api/media/v4l/
Dext-ctrls-camera.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _camera-controls:
13 .. _camera-control-id:
23 .. _v4l2-exposure-auto-type:
28 enum v4l2_exposure_auto_type -
37 .. flat-table::
38 :header-rows: 0
39 :stub-columns: 0
41 * - ``V4L2_EXPOSURE_AUTO``
42 - Automatic exposure time, automatic iris aperture.
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/Documentation/networking/device_drivers/ethernet/netronome/
Dnfp.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
14 - `Overview`_
15 - `Acquiring Firmware`_
16 - `Devlink Info`_
17 - `Configure Device`_
18 - `Statistics`_
25 are also incorporated in the companies' family of Agilio SmartNICs. The SR-IOV
35 Firmware files on the host filesystem contain card type (`AMDA-*` string), media
40 `linux-firmware.git` repository.
46 -----------------
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/Documentation/admin-guide/thermal/
Dintel_powerclamp.rst6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
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