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/Documentation/devicetree/bindings/gpio/
Dgpio-mmio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic MMIO GPIO
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
14 Some simple GPIO controllers may consist of a single data register or a pair
15 of set/clear-bit registers. Such controllers are common for glue logic in
16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
[all …]
Dgpio-zynq.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-zynq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq GPIO controller
10 - Michal Simek <michal.simek@amd.com>
15 - xlnx,zynq-gpio-1.0
16 - xlnx,zynqmp-gpio-1.0
17 - xlnx,versal-gpio-1.0
18 - xlnx,pmc-gpio-1.0
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Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
18 several GPIOs serve the same function (e.g. a parallel data line).
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
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Daspeed,ast2400-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/aspeed,ast2400-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aspeed GPIO controller
10 - Andrew Jeffery <andrew@codeconstruct.com.au>
15 - aspeed,ast2400-gpio
16 - aspeed,ast2500-gpio
17 - aspeed,ast2600-gpio
26 gpio-controller: true
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Dgpio-tpic2810.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-tpic2810.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TPIC2810 GPIO controller
10 - Aswath Govindraju <a-govindraju@ti.com>
15 - ti,tpic2810
20 gpio-controller: true
22 "#gpio-cells":
25 gpio-line-names:
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Dgpio-davinci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO controller for Davinci and keystone devices
10 - Keerthy <j-keerthy@ti.com>
15 - items:
16 - enum:
17 - ti,k2g-gpio
18 - ti,am654-gpio
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Dfcs,fxl6408.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/fcs,fxl6408.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Fairchild FXL6408 I2C GPIO Expander
10 - Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
15 - fcs,fxl6408
20 "#gpio-cells":
23 gpio-controller: true
25 gpio-line-names:
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Dgpio-ep9301.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: EP93xx GPIO controller
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
12 - Nikita Shubin <nikita.shubin@maquefel.me>
17 - const: cirrus,ep9301-gpio
18 - items:
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Dxylon,logicvc-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/gpio/xylon,logicvc-gpio.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Xylon LogiCVC GPIO controller
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 The LogiCVC GPIO describes the GPIO block included in the LogiCVC display
15 controller. These are meant to be used for controlling display-related
20 - GPIO[4:0] (display control) mapped to index 0-4
21 - EN_BLIGHT (power control) mapped to index 5
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Dnxp,pcf8575.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
15 combines the direction and output level into a single bit per line, which
17 line is configured (a) as output and driving the signal low/high, or (b) as
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Dgpio-pca95xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA95xx I2C GPIO multiplexer
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 Bindings for the family of I2C GPIO multiplexers/expanders: NXP PCA95xx,
19 - items:
20 - const: diodes,pi4ioe5v6534q
21 - const: nxp,pcal6534
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Dxlnx,gpio-xilinx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx AXI GPIO controller
10 - Neeli Srinivas <srinivas.neeli@amd.com>
13 The AXI GPIO design provides a general purpose input/output interface
14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
15 a single or a dual-channel device. The width of each channel is
22 - xlnx,xps-gpio-1.00.a
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/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
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/Documentation/firmware-guide/acpi/
Dgpio-properties.rst1 .. SPDX-License-Identifier: GPL-2.0
4 _DSD Device Properties Related to GPIO
8 allows names to be given to GPIOs (and other things as well) returned
10 the corresponding GPIO, which is pretty error prone (it depends on
31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
34 Package () { "reset-gpios", Package () { ^BTH, 1, 1, 0 } },
35 Package () { "shutdown-gpios", Package () { ^BTH, 0, 0, 0 } },
40 The format of the supported GPIO property is::
52 If 1, the GPIO is marked as active_low.
56 it to 1 marks the GPIO as active low.
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/Documentation/admin-guide/gpio/
Dgpio-sim.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Configfs GPIO Simulator
6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO
8 using the standard GPIO character device interface as well as manipulated
12 ------------------------
14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For
21 **Group:** ``/config/gpio-sim``
23 This is the top directory of the gpio-sim configfs tree.
25 **Group:** ``/config/gpio-sim/gpio-device``
27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name``
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Dgpio-aggregator.rst1 .. SPDX-License-Identifier: GPL-2.0-only
3 GPIO Aggregator
6 The GPIO Aggregator provides a mechanism to aggregate GPIOs, and expose them as
11 -----------------------------
13 GPIO controllers are exported to userspace using /dev/gpiochip* character
15 system permissions, on an all-or-nothing basis: either a GPIO controller is
18 The GPIO Aggregator provides access control for a set of one or more GPIOs, by
22 grab the full GPIO controller, and no longer needs to care about which GPIOs to
25 Aggregated GPIO controllers are instantiated and destroyed by writing to
26 write-only attribute files in sysfs.
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/Documentation/devicetree/bindings/leds/
Dleds-pca955x.txt1 * NXP - pca955x LED driver
4 to control LEDs can be used as general purpose I/Os. The GPIO pins can
5 be input or output, and output pins can also be pulse-width controlled.
8 - compatible : should be one of :
14 - #address-cells: must be 1
15 - #size-cells: must be 0
16 - reg: I2C slave address. depends on the model.
19 - gpio-controller: allows pins to be used as GPIOs.
20 - #gpio-cells: must be 2.
21 - gpio-line-names: define the names of the GPIO lines
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Dti,tca6507.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TCA6507 LED and GPIO controller
10 - NeilBrown <neilb@suse.de>
25 "#address-cells":
28 "#size-cells":
31 gpio-controller: true
33 "#gpio-cells":
36 gpio-line-names: true
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/Documentation/devicetree/bindings/net/bluetooth/
Dbrcm,bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
22 - enum:
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/Documentation/devicetree/bindings/net/wireless/
Dmicrochip,wilc1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adham Abozaeid <adham.abozaeid@microchip.com>
11 - Ajay Singh <ajay.kathat@microchip.com>
27 description: phandle to the clock connected on rtc clock line.
30 clock-names:
33 enable-gpios:
35 description: Used by wilc1000-spi to determine the GPIO line
36 connected to the ENABLE line. If specified, reset-gpios
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/Documentation/devicetree/bindings/gnss/
Dmediatek.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
13 Mediatek chipsets are used in GNSS-receiver modules produced by several
17 - $ref: gnss-common.yaml#
18 - $ref: /schemas/serial/serial-peripheral-props.yaml#
24 vcc-supply:
28 reset-gpios:
30 description: An optional reset line, with names such as RESET or NRESET.
[all …]
/Documentation/devicetree/bindings/hwmon/
Dnsa320-mcu.txt5 - compatible : "zyxel,nsa320-mcu"
6 - data-gpios : The GPIO pin connected to the data line on the MCU
7 - clk-gpios : The GPIO pin connected to the clock line on the MCU
8 - act-gpios : The GPIO pin connected to the active line on the MCU
13 compatible = "zyxel,nsa320-mcu";
14 pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
15 pinctrl-names = "default";
17 data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
18 clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
19 act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
/Documentation/devicetree/bindings/sound/
Dsamsung,aries-wm8994.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung,aries-wm8994.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Bakker <xc-racer2@live.ca>
13 - $ref: sound-card-common.yaml#
19 - samsung,aries-wm8994
21 - samsung,fascinate4g-wm8994
27 sound-dai:
34 - sound-dai
[all …]
/Documentation/devicetree/bindings/mfd/
Dmax77650.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MAX77650 ultra low-power PMIC from Maxim Integrated.
10 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
13 MAX77650 is an ultra-low power PMIC providing battery charging and power
14 supply for low-power IoT and wearable applications.
16 The GPIO-controller module is represented as part of the top-level PMIC
17 node. The device exposes a single GPIO line.
19 For device-tree bindings of other sub-modules (regulator, power supply,
[all …]
/Documentation/driver-api/gpio/
Dboard.rst2 GPIO Mappings
7 All platforms can enable the GPIO library, but if the platform strictly
8 requires GPIO functionality to be present, it needs to select GPIOLIB from its
14 -----------
16 exact way to do it depends on the GPIO controller providing the GPIOs, see the
20 <function>-gpios, where <function> is the function the driver will request
26 led-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>, /* red */
27 <&gpio 16 GPIO_ACTIVE_HIGH>, /* green */
28 <&gpio 17 GPIO_ACTIVE_HIGH>; /* blue */
30 power-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
[all …]

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