Searched +full:idle +full:- +full:state +full:- +full:name (Results 1 – 25 of 68) sorted by relevance
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| /Documentation/devicetree/bindings/powerpc/opal/ |
| D | power-mgt.txt | 1 IBM Power-Management Bindings 5 idle states. The description of these idle states is exposed via the 6 node @power-mgt in the device-tree by the firmware. 9 ---------------- 10 Typically each idle state has the following associated properties: 12 - name: The name of the idle state as defined by the firmware. 14 - flags: indicating some aspects of this idle states such as the 15 extent of state-loss, whether timebase is stopped on this 16 idle states and so on. The flag bits are as follows: 18 - exit-latency: The latency involved in transitioning the state of the [all …]
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| /Documentation/admin-guide/pm/ |
| D | cpuidle.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 CPU Idle Time Management 21 memory or executed. Those states are the *idle* states of the processor. 23 Since part of the processor hardware is not used in idle states, entering them 27 CPU idle time management is an energy-efficiency feature concerned about using 28 the idle states of processors for this purpose. 31 ------------ 33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that 37 software as individual single-core processors. In other words, a CPU is an 44 enter an idle state, that applies to the processor as a whole. [all …]
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| D | intel_idle.rst | 1 .. SPDX-License-Identifier: GPL-2.0 5 ``intel_idle`` CPU Idle Time Management Driver 17 :doc:`CPU idle time management subsystem <cpuidle>` in the Linux kernel 18 (``CPUIdle``). It is the default CPU idle time management driver for the 24 Documentation/admin-guide/pm/cpuidle.rst if you have not done that yet.] 27 logical CPU executing it is idle and so it may be possible to put some of the 28 processor's functional blocks into low-power states. That instruction takes two 38 only way to pass early-configuration-time parameters to it is via the kernel 42 .. _intel-idle-enumeration-of-states: 44 Enumeration of Idle States [all …]
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| /Documentation/driver-api/pm/ |
| D | cpuidle.rst | 1 .. SPDX-License-Identifier: GPL-2.0 5 CPU Idle Time Management 13 CPU Idle Time Management Subsystem 18 cores) is idle after an interrupt or equivalent wakeup event, which means that 19 there are no tasks to run on it except for the special "idle" task associated 21 belongs to. That can be done by making the idle logical CPU stop fetching 23 depended on by it into an idle state in which they will draw less power. 25 However, there may be multiple different idle states that can be used in such a 28 particular idle state. That is the role of the CPU idle time management 35 units: *governors* responsible for selecting idle states to ask the processor [all …]
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| /Documentation/devicetree/bindings/regulator/ |
| D | rohm,bd71828-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml. 16 The regulator controller is represented as a sub-node of the PMIC node 25 "^LDO[1-7]$": 32 regulator-name: 33 pattern: "^ldo[1-7]$" [all …]
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| D | rohm,bd71847-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml 20 Note that if BD71847 starts at RUN state you probably want to use 21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must 30 "^LDO[1-6]$": 37 regulator-name: [all …]
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| D | rohm,bd71837-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml 20 Note that if BD71837 starts at RUN state you probably want to use 21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not 31 "^LDO[1-7]$": 38 regulator-name: [all …]
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| /Documentation/devicetree/bindings/cpu/ |
| D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Idle states 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 11 - Anup Patel <anup@brainfault.org> 15 1 - Introduction 18 ARM and RISC-V systems contain HW capable of managing power consumption 19 dynamically, where cores can be put in different low-power states (ranging [all …]
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| /Documentation/trace/ |
| D | events-power.rst | 8 - Power state switch which reports events related to suspend (S-states), 9 cpuidle (C-states) and cpufreq (P-states) 10 - System clock related changes 11 - Power domains related changes and transitions 18 1. Power state switch events 22 ----------------- 24 A 'cpu' event class gathers the CPU-related events: cpuidle and 28 cpu_idle "state=%lu cpu_id=%lu" 29 cpu_frequency "state=%lu cpu_id=%lu" 36 machine_suspend "state=%lu" [all …]
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin 15 need to reconfigure pins at run-time, for example to tri-state pins when the 21 for client device device tree nodes to map those state names to the pin 25 For example, a pin controller may set up its own "active" state when the 35 For each client device individually, every pin state is assigned an integer 36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique 37 property exists to define the pin configuration. Each state may also be 38 assigned a name. When names are used, another property exists to map from 42 defined in its device tree node, and whether to define the set of state 43 IDs that must be provided, or whether to define the set of state names that [all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-system-cpu | 2 Date: pre-git history 3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 18 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 37 See Documentation/admin-guide/cputopology.rst for more information. 43 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 58 Contact: Linux memory management mailing list <linux-mm@kvack.org> 67 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2 77 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 89 core_siblings_list: human-readable list of the logical CPU 99 thread_siblings_list: human-readable list of cpuX's hardware [all …]
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| D | sysfs-class-regulator | 1 What: /sys/class/regulator/.../state 7 state. This reports the regulator enable control, for 20 supplying power to the system (unless some non-Linux 23 'unknown' means software cannot determine the state, or 24 the reported state is invalid. 38 - off 39 - on 40 - error 41 - fast 42 - normal [all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd71847-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is 18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica… 19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic… 24 - rohm,bd71847 25 - rohm,bd71850 [all …]
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| D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 13 BD71837MWV is programmable Power Management ICs for powering single-core, 14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low 18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica… 35 clock-names: 38 "#clock-cells": [all …]
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| /Documentation/admin-guide/ |
| D | kernel-per-CPU-kthreads.rst | 2 Reducing OS jitter due to per-cpu kthreads 5 This document lists per-CPU kthreads in the Linux kernel and presents 6 options to control their OS jitter. Note that non-per-CPU kthreads are 7 not listed here. To reduce OS jitter from non-per-CPU kthreads, bind 13 - Documentation/core-api/irq/irq-affinity.rst: Binding interrupts to sets of CPUs. 15 - Documentation/admin-guide/cgroup-v1: Using cgroups to bind tasks to sets of CPUs. 17 - man taskset: Using the taskset command to bind tasks to sets 20 - man sched_setaffinity: Using the sched_setaffinity() system 23 - /sys/devices/system/cpu/cpuN/online: Control CPU N's hotplug state, 26 - In order to locate kernel-generated OS jitter on CPU N: [all …]
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| D | md.rst | 5 --------------------------------- 49 -1 linear mode 58 (raid-0 and raid-1 only) 78 -------------------------------------- 87 that all auto-detected arrays are assembled as partitionable. 90 ------------------------------------------- 102 mdadm --assemble --force .... 112 md-mod.start_dirty_degraded=1 116 ------------------ 119 Currently, it supports superblock formats ``0.90.0`` and the ``md-1`` format [all …]
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| /Documentation/devicetree/bindings/mmc/ |
| D | ti-omap-hsmmc.txt | 10 -------------------- 11 - compatible: 12 Should be "ti,omap2-hsmmc", for OMAP2 controllers 13 Should be "ti,omap3-hsmmc", for OMAP3 controllers 14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 15 Should be "ti,omap4-hsmmc", for OMAP4 controllers 16 Should be "ti,am33xx-hsmmc", for AM335x controllers 17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers. 20 --------------------------------- 22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1. [all …]
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| /Documentation/livepatch/ |
| D | livepatch.rst | 30 - The kernel probes are the most generic. The code can be redirected by 33 - The function tracer calls the code from a predefined location that is 35 compiler using the '-pg' gcc option. 37 - Livepatching typically needs to redirect the code at the very beginning 74 The aim is to define a so-called consistency model. It attempts to define 79 kpatch: it uses kGraft's per-task consistency and syscall barrier 83 Patches are applied on a per-task basis, when the task is deemed safe to 85 transition state where tasks are converging to the patched state. 86 Usually this transition state can complete in a few seconds. The same 88 the patched state to the unpatched state. [all …]
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| /Documentation/RCU/Design/Data-Structures/ |
| D | Data-Structures.rst | 15 Data-Structure Relationships 18 RCU is for all intents and purposes a large state machine, and its 19 data structures maintain the state in such a way as to allow RCU readers 25 .. kernel-figure:: BigTreeClassicRCU.svg 34 which results in a three-level ``rcu_node`` tree. 38 The purpose of this combining tree is to allow per-CPU events 39 such as quiescent states, dyntick-idle transitions, 42 Quiescent states are recorded by the per-CPU ``rcu_data`` structures, 43 and other events are recorded by the leaf-level ``rcu_node`` 50 has passed through a quiescent state. [all …]
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,rpmh-rsc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 20 (Resource State Coordinator a.k.a RSC) that can handle multiple sleep and 26 have powered off to facilitate idle power saving. TCS could be classified as:: 27 ACTIVE - Triggered by Linux 28 SLEEP - Triggered by F/W 29 WAKE - Triggered by F/W [all …]
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| /Documentation/admin-guide/blockdev/ |
| D | zram.rst | 2 zram: Compressed RAM-based block devices 8 The zram module creates RAM-based block devices named /dev/zram<id> 20 There are several ways to configure and manage zram device(-s): 23 b) using zramctl utility, provided by util-linux (util-linux@vger.kernel.org). 28 In order to get a better idea about zramctl please consult util-linux 29 documentation, zramctl man-page or `zramctl --help`. Please be informed 30 that zram maintainers do not develop/maintain util-linux or zramctl, should 31 you have any questions please contact util-linux@vger.kernel.org 45 -EBUSY an attempt to modify an attribute that cannot be changed once 47 -ENOMEM zram was not able to allocate enough memory to fulfil your [all …]
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| /Documentation/timers/ |
| D | highres.rst | 8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf 11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf 19 switched to the name "clock event devices" in meantime. 23 - hrtimer base infrastructure 24 - timeofday and clock source management 25 - clock event management 26 - high resolution timer functionality 27 - dynamic ticks 31 --------------------------- 40 - time ordered enqueueing into a rb-tree [all …]
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| /Documentation/devicetree/bindings/gpio/ |
| D | ti,omap-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grygorii Strashko <grygorii.strashko@ti.com> 13 The general-purpose interface combines general-purpose input/output (GPIO) banks. 14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input 15 and output capabilities; interrupt generation in active mode and wake-up 16 request generation in idle mode upon the detection of external events. 21 - enum: [all …]
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | wkup-m3-ipc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dave Gerlach <d-gerlach@ti.com> 11 - Drew Fustini <dfustini@baylibre.com> 14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor 17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver 29 On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is 37 On AM437x SoCs, certain pins can be forced into an alternate state when IO [all …]
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | brcm,iproc-touchscreen.txt | 4 - compatible: must be "brcm,iproc-touchscreen" 5 - ts_syscon: handler of syscon node defining physical base 9 - clocks: The clock provided by the SOC to driver the tsc 10 - clock-names: name for the clock 11 - interrupts: The touchscreen controller's interrupt 12 - address-cells: Specify the number of u32 entries needed in child nodes. 14 - size-cells: Specify number of u32 entries needed to specify child nodes size 18 - scanning_period: Time between scans. Each step is 1024 us. Valid 1-256. 19 - debounce_timeout: Each step is 512 us. Valid 0-255 20 - settling_timeout: The settling duration (in ms) is the amount of time [all …]
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