Searched full:increment (Results 1 – 25 of 81) sorted by relevance
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| /Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-dma.yaml | 19 -bit 9: Peripheral Increment Address
20 0x0: no address increment between transfers
21 0x1: increment address between transfers
22 -bit 10: Memory Increment Address
23 0x0: no address increment between transfers
24 0x1: increment address between transfers
25 -bit 15: Peripheral Increment Offset Size
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| D | st,stm32-mdma.yaml | 22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
35 -bit 10-11: Destination increment offset size
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| /Documentation/translations/zh_CN/core-api/ |
| D | local_ops.rst | 150 /* Increment the counter from a non preemptible context */
151 printk("Increment on cpu %d\n", smp_processor_id());
166 /* Increment the counters */
179 /* initialize the timer that will increment the counter */
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-impedance-analyzer-ad5933 | 13 Frequency increment in Hz (step size) between consecutive
34 after each frequency increment, and before the ADC is triggered
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| D | sysfs-devices-edac | 37 increment, since EDAC will panic the system
156 counter will not have a chance to increment, since EDAC will panic the
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| D | sysfs-bus-pci-devices-aer_stats | 7 counters may increment at its link partner (e.g. root port) because the
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| D | sysfs-bus-fcoe | 78 Notes: ctlr_X (global increment starting at 0)
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| D | sysfs-devices-memory | 30 to expose the covered storage increment.
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| /Documentation/devicetree/bindings/dma/ |
| D | st_fdma.txt | 58 -bit 21: Increment Address
59 0x0: no address increment between transfers
60 0x1: increment address between transfers
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| /Documentation/mm/ |
| D | transhuge.rst | 118 - map/unmap of a PMD entry for the whole THP increment/decrement
119 folio->_entire_mapcount, increment/decrement folio->_large_mapcount
120 and also increment/decrement folio->_nr_pages_mapped by ENTIRELY_MAPPED
123 - map/unmap of individual pages with PTE entry increment/decrement
124 page->_mapcount, increment/decrement folio->_large_mapcount and also
125 increment/decrement folio->_nr_pages_mapped when page->_mapcount goes
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| /Documentation/core-api/ |
| D | local_ops.rst | 132 be a ``smp_wmb()`` between the buffer write and the counter increment and also a
156 /* Increment the counter from a non preemptible context */
157 printk("Increment on cpu %d\n", smp_processor_id());
172 /* Increment the counters */
185 /* initialize the timer that will increment the counter */
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| D | refcount-vs-atomic.rst | 66 counter increment or addition happened, function returned true),
101 case 3) - increment-based ops that return no value
125 case 5) - increment-based RMW ops that return a value
141 case 6) - increment-based RMW ops with acquire ordering that return a value
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| /Documentation/networking/ |
| D | segmentation-offloads.rst | 44 The default behavior is to increment the IP ID with every segment. If the
45 GSO type SKB_GSO_TCP_FIXEDID is specified then we will not increment the IP
48 and we will either increment the IP ID for all frames, or leave it at a
58 fragments should not increment as a single IPv4 datagram is fragmented.
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| /Documentation/block/ |
| D | stat.rst | 51 These values increment when an I/O request completes.
56 These values increment when an flush I/O request completes.
64 These values increment when an I/O request is merged with an
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| /Documentation/userspace-api/media/dvb/ |
| D | fe-read-uncorrected-blocks.rst | 38 increment in block count during a specific time interval should be
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| /Documentation/devicetree/bindings/sifive/ |
| D | sifive-blocks-ip-versioning.txt | 17 auto-discovery, the maintainers of these IP blocks intend to increment
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| /Documentation/arch/arm64/ |
| D | perf.rst | 174 FEAT_PMUv3_TH (Armv8.8) permits a PMU counter to increment only on
177 threshold is set to 2, then the PMU counter will now only increment by
181 To increment by 1 after passing the threshold condition instead of the
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| D | amu.rst | 37 When in WFI or WFE these counters do not increment.
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| /Documentation/translations/zh_CN/scheduler/ |
| D | sched-nice-design.rst | 68 asmlinkage long sys_nice(int increment)
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| /Documentation/i2c/ |
| D | i2c-stub.rst | 21 A pointer register with auto-increment is implemented for all byte
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| /Documentation/devicetree/bindings/net/ |
| D | micrel-ksz90x1.txt | 64 value is 0, and the maximum is property-dependent. The increment
163 All skew control options are specified in picoseconds. The increment
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| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-queryctrl.rst | 334 inclusive. The step value indicates the increment between values.
407 inclusive. The step value indicates the increment between values.
413 inclusive. The step value indicates the increment between values.
419 inclusive. The step value indicates the increment between values.
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| /Documentation/filesystems/ |
| D | files.rst | 115 before and after the reference count increment. This pattern can be seen
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| /Documentation/driver-api/usb/ |
| D | URB.rst | 198 is to increment the URB's reference count while holding the lock, then
200 decrement the URB's reference count. You increment the reference
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| /Documentation/power/ |
| D | runtime_pm.rst | 349 - run pm_runtime_resume(dev) and if successful, increment the device's
381 - increment the device's usage counter
384 - increment the device's usage counter, run pm_request_resume(dev) and
388 - increment the device's usage counter, run pm_runtime_resume(dev) and
398 nonzero, increment the counter and return 1; otherwise return 0 without
403 runtime PM status is RPM_ACTIVE, increment the counter and
439 - increment the device's 'power.disable_depth' field (if the value of that
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