Searched +full:irq +full:- +full:device (Results 1 – 25 of 462) sorted by relevance
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,stih407-irq-syscfg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
15 Configuration registers. This device is used to unmask them prior to use.
19 const: st,stih407-irq-syscfg
22 description: Phandle to Cortex-A9 IRQ system config registers
25 st,irq-device:
27 $ref: /schemas/types.yaml#/definitions/uint32-array
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| D | ti,keystone-irq.txt | 1 Keystone 2 IRQ controller IP
4 host using the IRQ controller IP. It provides 28 IRQ signals to ARM.
5 The IRQ handler running on HOST OS can identify DSP signal source by
10 - compatible: should be "ti,keystone-irq"
11 - ti,syscon-dev : phandle and offset pair. The phandle to syscon used to
12 access device control registers and the offset inside
13 device control registers range.
14 - interrupt-controller : Identifies the node as an interrupt controller
15 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
17 - interrupts: interrupt reference to primary interrupt controller
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| D | csky,mpintc.txt | 2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
6 SMP soc, and it also could be used in non-SMP system.
9 0-15 : software irq, and we use 15 as our IPI_IRQ.
10 16-31 : private irq, and we use 16 as the co-processor timer.
11 31-1024: common irq for soc ip.
13 Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
27 - compatible
31 - #interrupt-cells
35 - interrupt-controller:
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| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 3 ISL12057 is a trivial I2C device (it has simple device tree bindings,
8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
12 to the SoC but to a PMIC. It allows the device to be powered up when
13 RTC alarm rings. In order to mark the device has a wakeup source and
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
16 can wake up the device.
18 Required properties supported by the device:
20 - "compatible": must be "isil,isl12057"
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| /Documentation/devicetree/bindings/iio/accel/ |
| D | lis302.txt | 3 This device is matched via its bus drivers, and has a number of properties
4 that apply in on the generic device (independent from the bus).
8 - compatible: should be set to "st,lis3lv02d-spi"
9 - reg: the chipselect index
10 - spi-max-frequency: maximal bus speed, should be set to 1000000 unless
12 - interrupts: the interrupt generated by the device
15 - compatible: should be set to "st,lis3lv02d"
16 - reg: i2c slave address
17 - Vdd-supply: The input supply for Vdd
18 - Vdd_IO-supply: The input supply for Vdd_IO
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| /Documentation/power/ |
| D | suspend-and-interrupts.rst | 2 System Suspend and Device Interrupts
9 Suspending and Resuming Device IRQs
10 -----------------------------------
12 Device interrupt request lines (IRQs) are generally disabled during system
14 ->prepare, ->suspend and ->suspend_late callbacks have been executed for all
17 The rationale for doing so is that after the "late" phase of device suspend
21 interrupt handlers for shared IRQs that device drivers implementing them were
26 of suspend_device_irqs(), along with the "noirq" phase of device suspend and
29 Device IRQs are re-enabled during system resume, right before the "early" phase
30 of resuming devices (that is, before starting to execute ->resume_early
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| /Documentation/admin-guide/ |
| D | parport.rst | 4 The ``parport`` code provides parallel-port support under Linux. This
5 includes the ability to share one port between multiple device
12 because there are a lot of people using the same IRQ for their
16 port-sharing) and architecture-dependent (which deals with actually
28 architecture-dependent code with (for example)::
30 # insmod parport_pc io=0x3bc,0x378,0x278 irq=none,7,auto
32 to tell the ``parport`` code that you want three PC-style ports, one at
33 0x3bc with no IRQ, one at 0x378 using IRQ 7, and one at 0x278 with an
34 auto-detected IRQ. Currently, PC-style (``parport_pc``), Sun ``bpp``,
43 --------
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| /Documentation/ABI/testing/ |
| D | sysfs-kernel-irq | 1 What: /sys/kernel/irq
8 but in a more machine-friendly format. This directory contains
9 one subdirectory for each Linux IRQ number.
11 What: /sys/kernel/irq/<irq>/actions
15 Description: The IRQ action chain. A comma-separated list of zero or more
16 device names associated with this interrupt.
18 What: /sys/kernel/irq/<irq>/chip_name
22 Description: Human-readable chip name supplied by the associated device
25 What: /sys/kernel/irq/<irq>/hwirq
30 the underlying hardware IRQ number used for this Linux IRQ.
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| /Documentation/virt/kvm/devices/ |
| D | mpic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Device types supported:
9 - KVM_DEV_TYPE_FSL_MPIC_20 Freescale MPIC v2.0
10 - KVM_DEV_TYPE_FSL_MPIC_42 Freescale MPIC v4.2
20 KVM_DEV_MPIC_BASE_ADDR (rw, 64-bit)
25 KVM_DEV_MPIC_GRP_REGISTER (rw, 32-bit)
28 must be 4-byte aligned.
33 KVM_DEV_MPIC_GRP_IRQ_ACTIVE (rw, 32-bit)
34 IRQ input line for each standard openpic source. 0 is inactive and 1
37 For edge-triggered interrupts: Writing 1 is considered an activating
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-dsp-keystone.txt | 4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
8 - 8 for C66x CorePacx CPUs 0-7
11 - each GPIO can be configured only as output pin;
12 - setting GPIO value to 1 causes IRQ generation on target DSP core;
13 - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
17 - compatible: should be "ti,keystone-dsp-gpio"
18 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
19 access device state control registers and the offset of device's specific
20 registers within device state control registers range.
21 - gpio-controller: Marks the device node as a gpio controller.
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| D | cdns,gpio.txt | 4 - compatible: should be "cdns,gpio-r1p02".
5 - reg: the register base address and size.
6 - #gpio-cells: should be 2.
9 <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH
11 - gpio-controller: marks the device as a GPIO controller.
12 - clocks: should contain one entry referencing the peripheral clock driving
16 - ngpios: integer number of gpio lines supported by this controller, up to 32.
17 - interrupts: interrupt specifier for the controllers interrupt.
18 - interrupt-controller: marks the device as an interrupt controller. When
19 defined, interrupts, interrupt-parent and #interrupt-cells
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| /Documentation/driver-api/ |
| D | men-chameleon-bus.rst | 31 ----------------------
38 -----------------------------------------
41 that only use a single memory resource and share the PCI legacy IRQ. Not
44 - Multi-resource MCB devices like the VME Controller or M-Module carrier.
45 - MCB devices that need another MCB device, like SRAM for a DMA Controller's
47 - A per-carrier IRQ domain for carrier devices that have one (or more) IRQs
48 per MCB device like PCIe based carriers with MSI or MSI-X support.
55 - The MEN Chameleon Bus itself,
56 - drivers for MCB Carrier Devices and
57 - the parser for the Chameleon table.
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| /Documentation/PCI/ |
| D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
11 Since each CPU architecture implements different chip-sets and PCI devices
15 PCI device drivers.
17 A more complete resource is the third edition of "Linux Device Drivers"
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
26 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
33 a new device, the driver with a matching "description" will be notified.
38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
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| /Documentation/devicetree/bindings/sound/ |
| D | ak4118.txt | 3 This device supports I2C mode.
7 - compatible : "asahi-kasei,ak4118"
8 - reg : The I2C address of the device for I2C
9 - reset-gpios: A GPIO specifier for the reset pin
10 - irq-gpios: A GPIO specifier for the IRQ pin
16 #sound-dai-cells = <0>;
17 compatible = "asahi-kasei,ak4118";
19 reset-gpios = <&gpio 0 GPIO_ACTIVE_LOW>
20 irq-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
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| /Documentation/core-api/irq/ |
| D | irq-domain.rst | 6 space where each separate IRQ source is assigned a different number.
9 that each one gets assigned non-overlapping allocations of Linux
10 IRQ numbers.
15 mechanisms as the IRQ core system by modelling their interrupt
19 hardware interrupt numbers: whereas in the past, IRQ numbers could
20 be chosen so they matched the hardware IRQ line into the root
24 For this reason we need a mechanism to separate controller-local
25 interrupt numbers, called hardware irq's, from Linux IRQ numbers.
28 irq numbers, but they don't provide any support for reverse mapping of
29 the controller-local IRQ (hwirq) number into the Linux IRQ number
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| /Documentation/accel/qaic/ |
| D | qaic.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
13 IRQ Storm Mitigation
14 --------------------
16 While the AIC100 DMA Bridge hardware implements an IRQ storm mitigation
17 mechanism, it is still possible for an IRQ storm to occur. A storm can happen
19 can drain the response FIFO as quickly as the device can insert elements into
20 it, then the device will frequently transition the response FIFO from empty to
21 non-empty and generate MSIs at a rate equivalent to the speed of the
28 To mitigate this issue, the QAIC driver implements specific IRQ handling. When
29 QAIC receives an IRQ, it disables that line. This prevents the interrupt
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| /Documentation/devicetree/bindings/infiniband/ |
| D | hisilicon-hns-roce.txt | 10 - compatible: Should contain "hisilicon,hns-roce-v1".
11 - reg: Physical base address of the RoCE driver and
13 - eth-handle: phandle, specifies a reference to a node
14 representing a ethernet device.
15 - dsaf-handle: phandle, specifies a reference to a node
16 representing a dsaf device.
17 - node_guid: a number that uniquely identifies a device or component
18 - #address-cells: must be 2
19 - #size-cells: must be 2
21 - dma-coherent: Present if DMA operations are coherent.
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| /Documentation/PCI/endpoint/ |
| D | pci-test-function.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 However with the addition of EP-core in linux kernel, it is possible
13 a test device.
15 The PCI endpoint test device is a virtual device (defined in software)
19 The PCI endpoint test device has the following registers:
39 that the endpoint device must perform.
44 Bit 0 raise legacy IRQ
45 Bit 1 raise MSI IRQ
46 Bit 2 raise MSI-X IRQ
54 This register reflects the status of the PCI endpoint device.
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| D | pci-test-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 This document is a guide to help users use pci-epf-test function driver
13 Endpoint Device
17 ---------------------------
31 -------------------------
35 # ls /sys/bus/pci-epf/drivers
44 Creating pci-epf-test Device
45 ----------------------------
47 PCI endpoint function device can be created using the configfs. To create
48 pci-epf-test device, the following commands can be used::
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| /Documentation/networking/ |
| D | generic-hdlc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - Normal (routed) and Ethernet-bridged (Ethernet device emulation)
16 - ARP support (no InARP support in the kernel - there is an
17 experimental InARP user-space daemon available on:
20 2. raw HDLC - either IP (IPv4) interface or Ethernet device emulation
25 Generic HDLC is a protocol driver only - it needs a low-level driver
28 Ethernet device emulation (using HDLC or Frame-Relay PVC) is compatible
40 gcc -O2 -Wall -o sethdlc sethdlc.c
59 In Frame Relay mode, ifconfig master hdlc device up (without assigning
66 - sets physical interface for a given port
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| D | napi.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
12 In basic operation the device notifies the host about new events
15 The device may also be polled for events via NAPI without receiving
30 of the NAPI instance while the method is the driver-specific event
37 -----------
55 ------------
64 argument - drivers can process completions for any number of Tx
96 or return ``budget - 1``.
101 -------------
109 As mentioned in the :ref:`drv_ctrl` section - napi_disable() and subsequent
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| /Documentation/devicetree/bindings/mfd/ |
| D | da9055.txt | 3 DA9055 consists of a large and varied group of sub-devices (I2C Only):
5 Device Supply Names Description
6 ------ ------------ -----------
7 da9055-gpio : : GPIOs
8 da9055-regulator : : Regulators
9 da9055-onkey : : On key
10 da9055-rtc : : RTC
11 da9055-hwmon : : ADC
12 da9055-watchdog : : Watchdog
14 The CODEC device in DA9055 has a separate, configurable I2C address and so
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| D | 88pm860x.txt | 3 Required parent device properties:
4 - compatible : "marvell,88pm860x"
5 - reg : the I2C slave address for the 88pm860x chip
6 - interrupts : IRQ line for the 88pm860x chip
7 - interrupt-controller: describes the 88pm860x as an interrupt controller (has its own domain)
8 - #interrupt-cells : should be 1.
9 - The cell is the 88pm860x local IRQ number
11 Optional parent device properties:
12 - marvell,88pm860x-irq-read-clr: inicates whether interrupt status is cleared by read
13 - marvell,88pm860x-slave-addr: 88pm860x are two chips solution. <reg> stores the I2C address
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| /Documentation/devicetree/bindings/net/ |
| D | smsc,lan9115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
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| D | marvell-bt-8xxx.txt | 2 ------
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
25 - interrupt-names: Used only for USB based devices (See below)
26 - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the
29 named "wakeup" from the interrupt-names and interrupt arrays.
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