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/Documentation/devicetree/bindings/display/
Dingenic,lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs LCD controller
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4760-lcd
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Dmarvell,pxa2xx-lcdc.txt1 PXA LCD Controller
2 ------------------
5 - compatible : one of these
6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
9 - reg : should contain 1 register range (address and length).
10 - interrupts : framebuffer controller interrupt.
11 - clocks: phandle to input clocks
14 - lcd-supply: A phandle to a power regulator that controls the LCD voltage.
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Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON)
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
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Datmel,lcdc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Dharma Balasubiramani <dharma.b@microchip.com>
14 The LCD Controller (LCDC) consists of logic for transferring LCD image data
15 from an external display buffer to a TFT LCD panel. The LCDC has one display
17 interface and a look-up table to allow palletized display configurations. The
18 LCDC is programmable on a per layer basis, and supports different LCD
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Dintel,keembay-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Keem Bay display controller
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
15 const: intel,keembay-display
19 - description: LCD registers range
21 reg-names:
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Dcirrus,clps711x-fb.txt4 - compatible: Shall contain "cirrus,ep7209-fb".
5 - reg : Physical base address and length of the controller's registers +
7 - clocks : phandle + clock specifier pair of the FB reference clock.
8 - display : phandle to a display node as described in
9 Documentation/devicetree/bindings/display/panel/display-timing.txt.
11 - bits-per-pixel: Bits per pixel.
12 - ac-prescale : LCD AC bias frequency. This frequency is the required
13 AC bias frequency for a given manufacturer's LCD plate.
14 - cmap-invert : Invert the color levels (Optional).
17 - lcd-supply: Regulator for LCD supply voltage.
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Dst,stm32-ltdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 lcd-tft display controller
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
15 const: st,stm32-ltdc
22 - description: events interrupt line.
23 - description: errors interrupt line.
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Dilitek,ili9486.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
13 This binding is for display panels using an Ilitek ILI9486 controller in SPI
17 - $ref: panel/panel-common.yaml#
22 - enum:
23 # Waveshare 3.5" 320x480 Color TFT LCD
24 - waveshare,rpi-lcd-35
25 # Ozzmaker 3.5" 320x480 Color TFT LCD
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Dsitronix,st7586.txt4 - compatible: "lego,ev3-lcd".
5 - a0-gpios: The A0 signal (since this binding is for serial mode, this is
6 the pin labeled D1 on the controller, not the pin labeled A0)
7 - reset-gpios: Reset pin
9 The node for this driver must be a child node of a SPI controller, hence
10 all mandatory properties described in ../spi/spi-bus.txt must be specified.
13 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
17 compatible = "lego,ev3-lcd";
19 spi-max-frequency = <10000000>;
20 a0-gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
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Darm,pl11x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm PrimeCell Color LCD Controller PL110/PL111
10 - Liviu Dudau <Liviu.Dudau@arm.com>
11 - Andre Przywara <andre.przywara@arm.com>
14 The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
16 a variety of LCD panels.
24 - arm,pl110
25 - arm,pl111
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Dsitronix,st7735r.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Lechner <david@lechnology.com>
14 controller in SPI mode.
17 - $ref: panel/panel-common.yaml#
18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 - description:
24 Adafruit 1.8" 160x128 Color TFT LCD (Product ID 358 or 618)
26 - enum:
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/Documentation/devicetree/bindings/display/panel/
Dolimex,lcd-olinuxino.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Olimex Ltd. LCD-OLinuXino bridge panel.
10 - Stefan Mavrodiev <stefan@olimex.com>
13 This device can be used as bridge between a host controller and LCD panels.
15 - LCD-OLinuXino-4.3TS
16 - LCD-OLinuXino-5
17 - LCD-OLinuXino-7
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Dpanel-edp-legacy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp-legacy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Legacy eDP panels from before the "edp-panel" compatible
10 - Douglas Anderson <dianders@chromium.org>
14 "edp-panel" compatible was introduced. It is kept around to support old
16 the generic "edp-panel" is if it needed to be used on an eDP controller
17 that doesn't support the generic "edp-panel" compatible, but it should be
18 a strong preference to add the generic "edp-panel" compatible instead.
[all …]
Dsitronix,st7701.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sitronix ST7701 based LCD panels
10 - Jagan Teki <jagan@amarulasolutions.com>
13 ST7701 designed for small and medium sizes of TFT LCD display, is
17 Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
20 Densitron DMT028VGHMCMI-1A is 480x640, 2-lane MIPI DSI LCD panel
21 which has built-in ST7701 chip.
26 - enum:
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Dhimax,hx83102.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Himax HX83102 MIPI-DSI LCD panel controller
10 - Cong Yang <yangcong5@huaqin.corp-partner.google.com>
13 - $ref: panel-common.yaml#
18 - enum:
19 # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
20 - boe,nv110wum-l60
21 # IVO t109nw41 11.0" WUXGA TFT LCD panel
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/Documentation/admin-guide/auxdisplay/
Dks0108.rst2 ks0108 LCD Controller Driver Documentation
7 :Date: 2006-10-27
19 ---------------------
21 This driver supports the ks0108 LCD controller.
25 ---------------------
28 :Device Name: KS0108 LCD Controller
30 :Webpage: -
31 :Device Webpage: -
32 :Type: LCD Controller (Liquid Crystal Display Controller)
43 ---------
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Dcfag12864b.rst2 cfag12864b LCD Driver Documentation
7 :Date: 2006-10-27
19 ---------------------
21 This driver supports a cfag12864b LCD.
25 ---------------------
28 :Device Name: Crystalfontz 12864b LCD Series
32 :Type: LCD (Liquid Crystal Display)
36 :Controller: ks0108
38 :Pages: 8 each controller
45 ---------
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/Documentation/devicetree/bindings/display/atmel/
Datmel,hlcdc-display-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel/atmel,hlcdc-display-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel's High LCD Controller (HLCDC)
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
12 - Claudiu Beznea <claudiu.beznea@tuxon.dev>
15 The LCD Controller (LCDC) consists of logic for transferring LCD image
16 data from an external display buffer to a TFT LCD panel. The LCDC has one
[all …]
/Documentation/devicetree/bindings/display/armada/
Dmarvell,dove-lcd.txt4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
[all …]
/Documentation/devicetree/bindings/auxdisplay/
Dimg,ascii-lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/auxdisplay/img,ascii-lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASCII LCD displays on Imagination Technologies boards
10 - Paul Burton <paulburton@kernel.org>
15 - img,boston-lcd
16 - mti,malta-lcd
17 - mti,sead3-lcd
25 Offset in bytes to the LCD registers within the system controller
[all …]
Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hitachi HD44780 Character LCD Controller
10 - Geert Uytterhoeven <geert@linux-m68k.org>
13 The Hitachi HD44780 Character LCD Controller is commonly used on character
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
[all …]
/Documentation/fb/
Dsa1100fb.rst8 This is a driver for a graphic framebuffer for the SA-1100 LCD
9 controller.
19 controller. The bits per pixel (bpp) value should be 4, 8, 12, or
20 16. LCCR values are display-specific and should be computed as
21 documented in the SA-1100 Developer's Manual, Section 11.7. Dual-panel
26 (controlling backlights, powering on the LCD, etc.), the command line
35 lccr0:<value> Configure LCD control register 0 (11.7.3)
36 lccr1:<value> Configure LCD control register 1 (11.7.4)
37 lccr2:<value> Configure LCD control register 2 (11.7.5)
38 lccr3:<value> Configure LCD control register 3 (11.7.6)
/Documentation/devicetree/bindings/pwm/
Datmel,hlcdc-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/atmel,hlcdc-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel's HLCDC's PWM controller
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
12 - Claudiu Beznea <claudiu.beznea@tuxon.dev>
15 The LCDC integrates a Pulse Width Modulation (PWM) Controller. This block
16 generates the LCD contrast control signal (LCD_PWM) that controls the
[all …]
/Documentation/devicetree/bindings/display/tilcdc/
Dtilcdc.txt1 Device-Tree bindings for tilcdc DRM driver
4 - compatible: value should be one of the following:
5 - "ti,am33xx-tilcdc" for AM335x based boards
6 - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
7 - interrupts: the interrupt number
8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
14 - max-bandwidth: The maximum pixels per second that the memory
15 interface / lcd controller combination can sustain
16 - max-width: The maximum horizontal pixel width supported by
[all …]
/Documentation/devicetree/bindings/display/samsung/
Dsamsung,exynos7-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON)
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
16 DECON (Display and Enhancement Controller) is the Display Controller for the
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