Home
last modified time | relevance | path

Searched +full:memory +full:- +full:mapped (Results 1 – 25 of 372) sorted by relevance

12345678910>>...15

/Documentation/admin-guide/mm/
Dpagemap.rst12 physical frame each virtual page is mapped to. It contains one 64-bit
16 * Bits 0-54 page frame number (PFN) if present
17 * Bits 0-4 swap type if swapped
18 * Bits 5-54 swap offset if swapped
19 * Bit 55 pte is soft-dirty (see
20 Documentation/admin-guide/mm/soft-dirty.rst)
21 * Bit 56 page exclusively mapped (since 4.2)
22 * Bit 57 pte is uffd-wp write-protected (since 5.13) (see
23 Documentation/admin-guide/mm/userfaultfd.rst)
25 * Bits 59-60 zero
[all …]
Didle_page_tracking.rst8 The idle page tracking feature allows to track which memory pages are being
11 account when configuring the workload parameters, setting memory cgroup limits,
22 Currently, it consists of the only read-write file,
25 The file implements a bitmap where each bit corresponds to a memory page. The
26 bitmap is represented by an array of 8-byte integers, and the page at PFN #i is
27 mapped to bit #i%64 of array element #i/64, byte order is native. When a bit is
34 the page by writing to the file. A value written to the file is OR-ed with the
37 Only accesses to user memory pages are tracked. These are pages mapped to a
46 -EINVAL if you are not starting the read/write on an 8-byte boundary, or
48 this file beyond max PFN will return -ENXIO.
[all …]
Dnommu-mmap.rst2 No-MMU memory mapping support
5 The kernel has limited support for memory mapping under no-MMU conditions, such
6 as are used in uClinux environments. From the userspace point of view, memory
12 Memory mapping behaviour also involves the way fork(), vfork(), clone() and
16 The behaviour is similar between the MMU and no-MMU cases, but not identical;
21 In the MMU case: VM regions backed by arbitrary pages; copy-on-write
24 In the no-MMU case: VM regions backed by arbitrary contiguous runs of
31 the no-MMU case doesn't support these, behaviour is identical to
39 In the no-MMU case:
41 - If one exists, the kernel will re-use an existing mapping to the
[all …]
Dsoft-dirty.rst2 Soft-Dirty PTEs
5 The soft-dirty is a bit on a PTE which helps to track which pages a task
8 1. Clear soft-dirty bits from the task's PTEs.
15 3. Read soft-dirty bits from the PTEs.
18 64-bit qword is the soft-dirty one. If set, the respective PTE was
23 when the soft-dirty bit is cleared. So, after this, when the task tries to
25 the soft-dirty bit on the respective PTE.
28 soft-dirty bits clear, the #PF-s that occur after that are processed fast.
29 This is so, since the pages are still mapped to physical memory, and thus all
30 the kernel does is finds this fact out and puts both writable and soft-dirty
[all …]
Dconcepts.rst5 The memory management in Linux is a complex system that evolved over the
7 systems from MMU-less microcontrollers to supercomputers. The memory
16 Virtual Memory Primer
19 The physical memory in a computer system is a limited resource and
20 even for systems that support memory hotplug there is a hard limit on
21 the amount of memory that can be installed. The physical memory is not
27 All this makes dealing directly with physical memory quite complex and
28 to avoid this complexity a concept of virtual memory was developed.
30 The virtual memory abstracts the details of physical memory from the
32 physical memory (demand paging) and provides a mechanism for the
[all …]
/Documentation/devicetree/bindings/display/
Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
[all …]
/Documentation/userspace-api/media/dvb/
Ddmx-reqbufs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 DMX_REQBUFS - Initiate Memory Mapping and/or DMA buffer I/O
36 This ioctl is used to initiate a memory mapped or DMABUF based demux I/O.
38 Memory mapped buffers are located in device memory and must be allocated
39 with this ioctl before they can be mapped into the application's address
54 … be smaller than the number requested, even zero, when the driver runs out of free memory. A larger
63 buffers, however this cannot succeed when any buffers are still mapped.
70 On success 0 is returned, on error -1 and the ``errno`` variable is set
72 :ref:`Generic Error Codes <gen-errors>` chapter.
Ddmx-mmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _dmx-mmap:
13 dmx-mmap - Map device memory into application address space
20 .. code-block:: c
38 Length of the memory area to map. This must be a multiple of the
42 The ``prot`` argument describes the desired memory protection.
49 The ``flags`` parameter specifies the type of the mapped object,
50 mapping options and whether modifications made to the mapped copy of
61 ``MAP_SHARED`` allows applications to share the mapped memory with
62 other (e. g. child-) processes.
[all …]
Ddmx-munmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _dmx-munmap:
13 dmx-munmap - Unmap device memory
20 .. code-block:: c
31 Address of the mapped buffer as returned by the
35 Length of the mapped buffer. This must be the same value as given to
41 Unmaps a previously with the :c:func:`mmap()` function mapped
47 On success :c:func:`munmap()` returns 0, on failure -1 and the
52 mapped yet.
/Documentation/userspace-api/media/v4l/
Dfunc-mmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-mmap:
13 v4l2-mmap - Map device memory into application address space
18 .. code-block:: c
36 Length of the memory area to map. This must be the same value as
39 single-planar API, and the same value as returned by the driver in
41 the multi-planar API.
44 The ``prot`` argument describes the desired memory protection.
57 #. Device memory accesses (e. g. the memory on a graphics card
59 compared to main memory accesses, or reads may be significantly
[all …]
Dmmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
7 Streaming I/O (Memory Mapping)
14 streaming methods, to determine if the memory mapping flavor is
16 with the memory type set to ``V4L2_MEMORY_MMAP``.
19 between application and driver, the data itself is not copied. Memory
20 mapping is primarily intended to map buffers in device memory into the
21 application's address space. Device memory can be for example the video
22 memory on a graphics card with a video capture add-on. However, being
24 drivers support streaming as well, allocating buffers in DMA-able main
25 memory.
[all …]
Dvidioc-reqbufs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_REQBUFS - Initiate Memory Mapping, User Pointer I/O or DMA buffer I/O
34 This ioctl is used to initiate :ref:`memory mapped <mmap>`,
36 Memory mapped buffers are located in device memory and must be allocated
37 with this ioctl before they can be mapped into the application's address
48 the desired number of buffers, ``memory`` must be set to the requested
53 requested, even zero, when the driver runs out of free memory. A larger
62 buffers. Note that if any buffers are still mapped or exported via DMABUF,
78 .. flat-table:: struct v4l2_requestbuffers
79 :header-rows: 0
[all …]
Dfunc-munmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-munmap:
13 v4l2-munmap - Unmap device memory
18 .. code-block:: c
29 Address of the mapped buffer as returned by the
33 Length of the mapped buffer. This must be the same value as given to
36 single-planar API and in the struct
38 multi-planar API.
43 Unmaps a previously with the :c:func:`mmap()` function mapped
49 On success :c:func:`munmap()` returns 0, on failure -1 and the
[all …]
Dvidioc-create-bufs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_CREATE_BUFS - Create buffers for Memory Mapped or User Pointer or DMA Buffer I/O
34 This ioctl is used to create buffers for :ref:`memory mapped <mmap>`
44 ``memory`` field specifies the requested I/O method and the ``reserved``
53 ``type`` field the requested buffer size (for single-planar) or plane
54 sizes (for multi-planar formats) will be used for the allocated buffers.
63 it is larger, then the value will be used as-is. In other words, the
77 .. flat-table:: struct v4l2_create_buffers
78 :header-rows: 0
79 :stub-columns: 0
[all …]
/Documentation/driver-api/
Dio_ordering.rst2 Ordering I/O writes to memory-mapped addresses
5 On some platforms, so-called memory-mapped I/O is weakly ordered. On such
7 memory-mapped addresses on their device arrive in the order intended. This is
13 memory barrier op, mb(), only with respect to I/O).
/Documentation/devicetree/bindings/gpio/
Dgpio-mm-lantiq.txt1 Lantiq SoC External Bus memory mapped GPIO controller
4 only gpios. This driver configures a special memory address, which when
7 The node describing the memory mapped GPIOs needs to be a child of the node
11 - compatible : Should be "lantiq,gpio-mm-lantiq"
12 - reg : Address and length of the register set for the device
13 - #gpio-cells : Should be two. The first cell is the pin number and
16 - gpio-controller : Marks the device node as a gpio controller.
19 - lantiq,shadow : The default value that we shall assume as already set on the
25 #address-cells = <2>;
26 #size-cells = <1>;
[all …]
/Documentation/core-api/
Ddma-api.rst8 of the API (and actual examples), see Documentation/core-api/dma-api-howto.rst.
11 Part II describes extensions for supporting non-consistent memory
13 non-consistent platforms (this is usually only legacy platforms) you
16 Part I - dma_API
17 ----------------
19 To get the dma_API, you must #include <linux/dma-mapping.h>. This
27 Part Ia - Using large DMA-coherent buffers
28 ------------------------------------------
36 Consistent memory is memory for which a write by either the device or
40 devices to read that memory.)
[all …]
/Documentation/scsi/
Dg_NCR5380.rst1 .. SPDX-License-Identifier: GPL-2.0
16 memory mapped modes.
25 The NCR53c400 does not support DMA but it does have Pseudo-DMA which is
38 base=xx[,...] the port or base address(es) (for port or memory mapped, resp.)
50 These old-style parameters can support only one card:
54 ncr_addr=xx the port or base address (for port or memory
55 mapped, resp.)
71 E.g. a port mapped NCR5380 board, driver to probe for IRQ::
79 E.g. a memory mapped NCR53C400 board with no IRQ::
87 E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ
/Documentation/arch/loongarch/
Dintroduction.rst1 .. SPDX-License-Identifier: GPL-2.0
7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are
8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit
9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels
12 instruction set, virtual memory and some other topics of LoongArch.
22 ----
24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32
25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers
26 are not architecturally special. (Except ``$r1``, which is hard-wired as the
30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`:
[all …]
/Documentation/devicetree/bindings/clock/
Dfixed-mmio-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple memory mapped IO fixed-rate clock sources
10 This binding describes a fixed-rate clock for which the frequency can
11 be read from a single 32-bit memory mapped I/O register.
17 - Jan Kotas <jank@cadence.com>
21 const: fixed-mmio-clock
26 "#clock-cells":
[all …]
/Documentation/devicetree/bindings/net/
Dmdio-mux-mmioreg.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
[all …]
/Documentation/mm/
Dbalance.rst2 Memory Balancing
7 Memory balancing is needed for !__GFP_HIGH and !__GFP_KSWAPD_RECLAIM as
13 overhead of page reclaim. This may happen for opportunistic high-order
14 allocation requests that have order-0 fallback options. In such cases,
21 is, only when needed (aka zone free memory is 0), instead of making it
25 mapped pages from the direct mapped pool, instead of falling back on
27 or not). A similar argument applies to highmem and direct mapped pages.
29 regular memory requests by allocating one from the dma pool, instead
32 In 2.2, memory balancing/page reclamation would kick off only when the
33 _total_ number of free pages fell below 1/64 th of total memory. With the
[all …]
Dhighmem.rst2 High Memory Handling
9 What Is High Memory?
12 High memory (highmem) is used when the size of physical memory approaches or
13 exceeds the maximum size of virtual memory. At that point it becomes
14 impossible for the kernel to keep all of the available physical memory mapped
16 the pieces of physical memory that it wants to access.
18 The part of (physical) memory not covered by a permanent mapping is what we
24 kernel entry/exit. This means the available virtual memory space (4GiB on
30 +--------+ 0xffffffff
32 +--------+ 0xc0000000
[all …]
/Documentation/arch/arm/
Dmemory.rst2 Kernel Memory Layout on ARM Linux
9 This document describes the virtual memory layout which the Linux
13 The ARM CPU is capable of addressing a maximum of 4GB virtual memory
34 The CPU vectors are mapped here if the
39 in proc-xscale.S to flush the whole data
53 ff800000 ffbfffff Permanent, fixed read-only mapping of the
59 VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
60 Memory returned by vmalloc/ioremap will
68 PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region.
72 PKMAP_BASE PAGE_OFFSET-1 Permanent kernel mappings
[all …]
/Documentation/firmware-guide/acpi/
Dlpit.rst1 .. SPDX-License-Identifier: GPL-2.0
13 (Function fixed hardware) or a memory mapped interface.
18 - CPU PKG C10 (Read via FFH interface)
19 - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)

12345678910>>...15