Searched +full:multi +full:- +full:master (Results 1 – 25 of 67) sorted by relevance
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| /Documentation/devicetree/bindings/arm/freescale/ |
| D | m4if.txt | 1 * Freescale Multi Master Multi Memory Interface (M4IF) module
4 - compatible : Should be "fsl,imx51-m4if"
5 - reg : Address and length of the register set for the device
10 compatible = "fsl,imx51-m4if";
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| /Documentation/networking/device_drivers/ethernet/ti/ |
| D | am65_nuss_cpsw_switchdev.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 ip -d link show dev sw0p1 | grep switchid
20 Multi mac mode
23 - The driver is operating in multi-mac mode by default, thus
29 See Documentation/networking/devlink/am65-nuss-cpsw-switch.rst
40 This can be done regardless of the state of Port's netdev devices - UP/DOWN, but
45 When the both interfaces joined the bridge - CPSW switch driver will enable
62 ip link set dev sw0p1 master br0
63 ip link set dev sw0p2 master br0
84 bridge vlan add dev br0 vid 1 pvid untagged self <---- add cpu port to VLAN 1
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| /Documentation/devicetree/bindings/dma/ |
| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: dma-controller.yaml#
19 - const: snps,dma-spear1340
20 - items:
21 - enum:
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| /Documentation/devicetree/bindings/iommu/ |
| D | sprd,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Unisoc IOMMU and Multi-media MMU
11 - Chunyan Zhang <zhang.lyra@gmail.com>
16 - sprd,iommu-v1
18 "#iommu-cells":
21 Unisoc IOMMUs are all single-master IOMMU devices, therefore no
22 additional information needs to associate with its master device.
35 - compatible
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| D | iommu.txt | 2 master(s).
13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
31 master IOMMU devices can translate accesses from more than one master.
34 "dma-ranges" property that describes how the physical address space of the
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
39 --------------------
40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
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| /Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra210-mvc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mvc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Master Volume Control (MVC) provides gain or attenuation to a digital
11 signal path. It can be used in input or output signal path for per-stream
12 volume control or it can be used as master volume control. The MVC block
14 multi-channel (up to 7.1 channels) stream. An independent mute control is
18 - Jon Hunter <jonathanh@nvidia.com>
19 - Mohan Kumar <mkumard@nvidia.com>
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| D | microchip,sama7g5-i2smcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I2S Multi-Channel Controller
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
15 multi-channel audio codecs. It consists of a receiver, a transmitter and a
19 multi-channel is supported by using multiple data pins, output and
23 "#sound-dai-cells":
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| D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
18 bitclock-master:
19 description: Indicates dai-link bit clock master
22 frame-inversion:
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| /Documentation/i2c/ |
| D | slave-testunit-backend.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 by Wolfram Sang <wsa@sang-engineering.com> in 2020
11 easy to obtain). Examples include multi-master testing, and SMBus Host Notify
13 between master and slave mode because it needs to send data, too.
21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
30 compatible = "slave-testunit";
39 When writing, the device consists of 4 8-bit registers and, except for some
43 .. csv-table::
51 Using 'i2cset' from the i2c-tools package, the generic command looks like::
53 # i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
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| D | gpio-fault-injection.rst | 5 The GPIO based I2C bus master driver can be configured to provide fault
7 which is driven by the I2C bus master driver under test. The GPIO fault
9 master driver should handle gracefully.
12 'i2c-fault-injector' subdirectory in the Kernel debugfs filesystem, usually
15 injection. They will be described now along with their intended use-cases.
21 -----
26 because the bus master under test will not be able to clock. It should detect
31 -----
36 master under test should detect this condition and trigger a bus recovery (see
52 in a bus master driver, make sure you checked your hardware setup for such
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-arb-gpio-challenge.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
15 the master of an I2C bus in a multimaster situation.
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
25 problems (hard to tell if i2c issues were caused by one master, another,
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| /Documentation/driver-api/ |
| D | i2c.rst | 5 the "Inter-IC" bus, a simple bus protocol which is widely used where low
7 some vendors use another name (such as "Two-Wire Interface", TWI) for
12 I2C is a multi-master bus; open drain signaling is used to arbitrate
16 The Linux I2C programming interfaces support the master side of bus
38 .. kernel-doc:: include/linux/i2c.h
41 .. kernel-doc:: drivers/i2c/i2c-boardinfo.c
44 .. kernel-doc:: drivers/i2c/i2c-core-base.c
47 .. kernel-doc:: drivers/i2c/i2c-core-smbus.c
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| /Documentation/driver-api/soundwire/ |
| D | summary.rst | 10 SoundWire is a 2-pin multi-drop interface with data and clock line. It
15 commands over a single two-pin interface.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
35 Below figure shows an example of connectivity between a SoundWire Master and
38 +---------------+ +---------------+
40 | Master |-------+-------------------------------| Slave |
42 | |-------|-------+-----------------------| |
43 +---------------+ | | +---------------+
47 +--+-------+--+
52 +-------------+
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| D | stream.rst | 24 -------------------------
26 -------------------------
28 Example 1: Stereo Stream with L and R channels is rendered from Master to
29 Slave. Both Master and Slave is using single port. ::
31 +---------------+ Clock Signal +---------------+
32 | Master +----------------------------------+ Slave |
36 | L + R +----------------------------------+ L + R |
38 +---------------+ +-----------------------> +---------------+
42 Master. Both Master and Slave is using single port. ::
45 +---------------+ Clock Signal +---------------+
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| /Documentation/scsi/ |
| D | advansys.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
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| /Documentation/devicetree/bindings/display/sprd/ |
| D | sprd,display-subsystem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Unisoc DRM master device
10 - Kevin Tang <kevin.tang@unisoc.com>
13 The Unisoc DRM master device is a virtual device needed to list all
18 multi display controllers and corresponding physical interfaces.
23 dpu0 and dpu1 both binding to DSI for dual mipi-dsi display;
26 +-----------------------------------------+
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| /Documentation/sound/cards/ |
| D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
36 will be FULL VOLUME regardless of Master and PCM volumes [#]_.
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
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| /Documentation/trace/ |
| D | intel_th.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 --------
23 - Software Trace Hub (STH), trace source, which is a System Trace
25 - Memory Storage Unit (MSU), trace output, which allows storing
27 - Parallel Trace Interface output (PTI), trace output to an external
29 - Global Trace Hub (GTH), which is a switch and a central component
33 Documentation/ABI/testing/sysfs-bus-intel_th-output-devices, the most
39 description is at Documentation/ABI/testing/sysfs-bus-intel_th-devices-gth.
54 [1] https://software.intel.com/sites/default/files/managed/d3/3c/intel-th-developer-manual.pdf
57 ------------------
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| /Documentation/driver-api/i3c/ |
| D | protocol.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
25 while remaining power-efficient.
35 * Master: the device is driving the bus. It's the one in charge of initiating
39 slave on the bus. The device can still send events to the master on
40 its own initiative if the master allowed it.
42 I3C is a multi-master protocol, so there might be several masters on a bus,
43 though only one device can act as a master at a given time. In order to gain
44 bus ownership, a master has to follow a specific procedure.
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| /Documentation/devicetree/bindings/power/supply/ |
| D | sbs,sbs-battery.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/sbs,sbs-battery.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
16 - $ref: power-supply.yaml#
21 - items:
22 - enum:
23 - ti,bq20z45
24 - ti,bq20z65
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| /Documentation/networking/ |
| D | vrf.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 routing and forwarding domains (aka VRFs, VRF-lite to be specific) in the
12 Linux network stack. One use case is the multi-tenancy problem where each
30 ------
34 +-----------------------------+
35 | vrf-blue | ===> route table 10
36 +-----------------------------+
38 +------+ +------+ +-------------+
40 +------+ +------+ +-------------+
42 +------+ +------+
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| /Documentation/firmware-guide/acpi/apei/ |
| D | output_format.rst | 1 .. SPDX-License-Identifier: GPL-2.0
55 [cache error][, TLB error][, bus error][, micro-architectural error]
81 unknown | no error | single-bit ECC | multi-bit ECC | \
82 single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
106 downstream switch port | PCIe to PCI/PCI-X bridge | \
107 PCI/PCI-X to PCIe bridge | root complex integrated endpoint device | \
121 Replay Timer Timeout | Advisory Non-Fatal
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| /Documentation/devicetree/bindings/spi/ |
| D | sprd,spi-adi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
28 Thus we introduce one property named "sprd,hw-channels" to configure hardware
33 Since we have multi-subsystems will use unique ADI to access analog chip, when
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-cadence-torrent.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
26 '#address-cells':
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| /Documentation/userspace-api/media/ |
| D | glossary.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
58 **Field-programmable Gate Array**
63 See https://en.wikipedia.org/wiki/Field-programmable_gate_array.
72 together make a larger user-facing functional peripheral. For
80 **Inter-Integrated Circuit**
82 A multi-master, multi-slave, packet switched, single-ended,
84 like sub-device hardware components.
86 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf.
120 - :term:`CEC API`;
121 - :term:`Digital TV API`;
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