Searched +full:nand +full:- +full:ecc +full:- +full:maximize (Results 1 – 3 of 3) sorted by relevance
1 NVIDIA Tegra NAND Flash controller4 - compatible: Must be one of:5 - "nvidia,tegra20-nand"6 - reg: MMIO address range7 - interrupts: interrupt output of the NFC controller8 - clocks: Must contain an entry for each entry in clock-names.9 See ../clocks/clock-bindings.txt for details.10 - clock-names: Must include the following entries:11 - nand12 - resets: Must contain an entry for each entry in reset-names.[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Raw NAND Chip Common Properties10 - Miquel Raynal <miquel.raynal@bootlin.com>13 - $ref: nand-chip.yaml#16 The ECC strength and ECC step size properties define the user18 they request the ECC engine to correct {strength} bit errors per19 {size} bytes for a particular raw NAND chip.[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Broadcom STB NAND Controller10 - Brian Norris <computersforpeace@gmail.com>11 - Kamal Dasu <kdasu.kdev@gmail.com>12 - William Zhang <william.zhang@broadcom.com>15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND16 flash chips. It has a memory-mapped register interface for both control27 -- Additional SoC-specific NAND controller properties --[all …]