Searched +full:nand +full:- +full:use +full:- +full:soft +full:- +full:ecc +full:- +full:engine (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mtd/nand-chip.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NAND Chip Common Properties10 - Miquel Raynal <miquel.raynal@bootlin.com>13 - $ref: mtd.yaml#16 This file covers the generic description of a NAND chip. It implies that the17 bus interface should not be taken into account: both raw NAND devices and18 SPI-NAND devices are concerned by this description.[all …]
1 Atmel NAND flash controller bindings3 The NAND flash controller node should be defined under the EBI bus (see4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).5 One or several NAND devices can be defined under this NAND controller.6 The NAND controller might be connected to an ECC engine.8 * NAND controller bindings:11 - compatible: should be one of the following12 "atmel,at91rm9200-nand-controller"13 "atmel,at91sam9260-nand-controller"14 "atmel,at91sam9261-nand-controller"[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Raw NAND Chip Common Properties10 - Miquel Raynal <miquel.raynal@bootlin.com>13 - $ref: nand-chip.yaml#16 The ECC strength and ECC step size properties define the user18 they request the ECC engine to correct {strength} bit errors per19 {size} bytes for a particular raw NAND chip.[all …]