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/Documentation/devicetree/bindings/interrupt-controller/
Driscv,imsics.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Incoming MSI Controller (IMSIC)
10 - Anup Patel <anup@brainfault.org>
13 The RISC-V advanced interrupt architecture (AIA) defines a per-CPU incoming
14 MSI controller (IMSIC) for handling MSIs in a RISC-V platform. The RISC-V
15 AIA specification can be found at https://github.com/riscv/riscv-aia.
17 The IMSIC is a per-CPU (or per-HART) device with separate interrupt file
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/Documentation/devicetree/bindings/pci/
Dnvidia,tegra194-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
26 - nvidia,tegra194-pcie
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Dnvidia,tegra194-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
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/Documentation/driver-api/
Dvme.rst5 -------------------
24 .. code-block:: c
30 if (vdev->id.num >= USER_BUS_MAX)
39 Here, the 'num' field refers to the sequential device ID for this specific
41 dev->bridge->num.
49 -------------------
53 succeeds, a non-zero value should be returned. A zero return value indicates
73 transfers to be provided in the route attributes. This is typically VME-to-MEM
74 and/or MEM-to-VME, though some hardware can support VME-to-VME and MEM-to-MEM
85 --------------
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/Documentation/networking/device_drivers/ethernet/intel/
Diavf.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2013-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Additional Configurations
16 - Known Issues/Troubleshooting
17 - Support
30 The guest OS loading the iavf driver must support MSI-X interrupts.
53 ---------------------
58 # dmesg -n 8
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Di40e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
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/Documentation/devicetree/bindings/iommu/
Diommu.txt13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
34 "dma-ranges" property that describes how the physical address space of the
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
39 --------------------
40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
44 the specific IOMMU. Below are a few examples of typical use-cases:
46 - #iommu-cells = <0>: Single master IOMMU devices are not configurable and
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/Documentation/arch/powerpc/
Dkvm-nested.rst1 .. SPDX-License-Identifier: GPL-2.0
44 vCPU (except in the short sequence in the L0 on L1 -> L2 entry and L2
45 -> L1 exit).
74 - L1 and L0 negotiate capabilities with H_GUEST_{G,S}ET_CAPABILITIES()
77 - L1 requests the L0 create an L2 with H_GUEST_CREATE() and receives a token
79 - L1 requests the L0 create an L2 vCPU with H_GUEST_CREATE_VCPU()
81 - L1 and L0 communicate the vCPU state using the H_GUEST_{G,S}ET() hcall
83 - L1 requests the L0 runs the vCPU running H_GUEST_VCPU_RUN() hcall
85 - L1 deletes L2 with H_GUEST_DELETE()
99 --------------------------
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/Documentation/userspace-api/media/v4l/
Dext-ctrls-codec.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-controls:
24 .. _mpeg-control-id:
26 Codec Control IDs
27 -----------------
35 .. _v4l2-mpeg-stream-type:
40 enum v4l2_mpeg_stream_type -
41 The MPEG-1, -2 or -4 output stream type. One cannot assume anything
48 .. flat-table::
49 :header-rows: 0
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/Documentation/networking/dsa/
Ddsa.rst22 An Ethernet switch typically comprises multiple front-panel ports and one
27 gateways, or even top-of-rack switches. This host Ethernet controller will
36 For each front-panel port, DSA creates specialized network devices which are
37 used as controlling and data-flowing endpoints for use by the Linux networking
46 - what port is this frame coming from
47 - what was the reason why this frame got forwarded
48 - how to send CPU originated traffic to specific ports
52 on Port-based VLAN IDs).
57 - the "cpu" port is the Ethernet switch facing side of the management
61 - the "dsa" port(s) are just conduits between two or more switches, and as such
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/Documentation/networking/
Drxrpc.rst1 .. SPDX-License-Identifier: GPL-2.0
7 The RxRPC protocol driver provides a reliable two-phase transport on top of UDP
38 RxRPC is a two-layer protocol. There is a session layer which provides
44 +-------------+
46 +-------------+
48 +-------------+
50 +-------------+
52 +-------------+
60 (2) A two-phase protocol. The client transmits a blob (the request) and then
82 to use - currently only PF_INET is supported.
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/Documentation/sound/kernel-api/
Dwriting-an-alsa-driver.rst11 Architecture) <http://www.alsa-project.org/>`__ driver. The document
19 low-level driver implementation details. It only describes the standard
26 -------
56 --------------
60 sub-directories contain different modules and are dependent upon the
74 This directory and its sub-directories are for the ALSA sequencer. This
76 as snd-seq-midi, snd-seq-virmidi, etc. They are compiled only when
85 -----------------
88 to be exported to user-space, or included by several files in different
94 -----------------
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/Documentation/scsi/
Dncr53c8xx.rst1 .. SPDX-License-Identifier: GPL-2.0
11 95170 DEUIL LA BARRE - FRANCE
64 10.4 PCI configuration fix-up boot option
81 16.1 Synchronous timings for 53C875 and 53C860 Ultra-SCSI controllers
82 16.2 Synchronous timings for fast SCSI-2 53C8XX controllers
97 - Gerard Roudier <groudier@free.fr>
101 - Wolfgang Stanglmeier <wolf@cologne.de>
102 - Stefan Esser <se@mi.Uni-Koeln.de>
106 - ncr53c8xx generic driver that supports all the SYM53C8XX family including
109 - sym53c8xx enhanced driver (a.k.a. 896 drivers) that drops support of oldest
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/Documentation/admin-guide/
Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
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