| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-dbg-g-chip-info.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_DBG_G_CHIP_INFO - Identify the chips on a TV card
40 query the driver about the chips present on the TV card. Regular
41 applications must not use it. When you found a chip specific bug, please
42 contact the linux-media mailing list
52 :ref:`VIDIOC_DBG_G_CHIP_INFO` with a pointer to this structure. On success
53 the driver stores information about the selected chip in the ``name``
57 selects the nth bridge 'chip' on the TV card. You can enumerate all
60 zero always selects the bridge chip itself, e. g. the chip connected to
61 the PCI or USB bus. Non-zero numbers identify specific parts of the
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| D | vidioc-dbg-g-register.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_DBG_G_REGISTER - VIDIOC_DBG_S_REGISTER - Read or write hardware registers
55 ``match.type`` and ``match.addr`` or ``match.name`` fields select a chip
56 on the TV card, the ``reg`` field specifies a register number and the
61 ``VIDIOC_DBG_G_REGISTER`` with a pointer to this structure. On success
66 selects the nth non-sub-device chip on the TV card. The number zero
67 always selects the host chip, e. g. the chip connected to the PCI or USB
72 selects the nth sub-device.
83 We recommended the v4l2-dbg utility over calling these ioctls directly.
84 It is available from the LinuxTV v4l-dvb repository; see
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| /Documentation/arch/powerpc/ |
| D | vcpudispatch_stats.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 on their associated physical processor chip. However, under certain
11 scenarios, vcpus may be dispatched on a different processor chip (away
31 2. number of times this vcpu was dispatched on the same processor as last
33 3. number of times this vcpu was dispatched on a different processor core
34 as last time, but within the same chip
35 4. number of times this vcpu was dispatched on a different chip
36 5. number of times this vcpu was dispatches on a different socket/drawer
42 6. number of times this vcpu was dispatched in its home node (chip)
68 statistics were enabled. 4126 of those dispatches were on the same
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| /Documentation/userspace-api/gpio/ |
| D | chardev.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 Read Documentation/driver-api/gpio/drivers-on-gpio.rst to avoid reinventing
21 Similarly, for multi-function lines there may be other subsystems, such as
23 Documentation/driver-api/pwm.rst, Documentation/w1/index.rst etc, that
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
33 Chip chapter
36 The Chip represents a single GPIO chip and is exposed to userspace using device
39 Each chip supports a number of GPIO lines,
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| D | chardev_v1.rst | 1 .. SPDX-License-Identifier: GPL-2.0
20 The API is based around three major objects, the :ref:`gpio-v1-chip`, the
21 :ref:`gpio-v1-line-handle`, and the :ref:`gpio-v1-line-event`.
26 .. _gpio-v1-chip:
28 Chip chapter
31 The Chip represents a single GPIO chip and is exposed to userspace using device
34 Each chip supports a number of GPIO lines,
35 :c:type:`chip.lines<gpiochip_info>`. Lines on the chip are identified by an
36 ``offset`` in the range from 0 to ``chip.lines - 1``, i.e. `[0,chip.lines)`.
38 Lines are requested from the chip using either gpio-get-linehandle-ioctl.rst
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| /Documentation/scsi/ |
| D | 53c700.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 This driver supports the 53c700 and 53c700-66 chips. It also supports
12 does sync (-66 and 710 only), disconnects and tag command queueing.
29 define if the chipset must be supported in little endian mode on a big
30 endian architecture (used for the 700 on parisc).
33 Using the Chip Core Driver
36 In order to plumb the 53c700 chip core driver into a working SCSI
37 driver, you need to know three things about the way the chip is wired
45 the SCSI Id from the card bios or whether the chip is wired for
54 asynchronous dividers for the chip. As a general rule of thumb,
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-platform-kunpeng_hccs | 9 contains read-only attributes exposing some summarization
10 information of all HCCS ports under a specified chip.
11 The X in 'chipX' indicates the Xth chip on platform.
16 all_linked: (RO) if all enabled ports on this chip are
18 linked_full_lane: (RO) if all linked ports on this chip are full
20 crc_err_cnt: (RO) total CRC err count for all ports on this
21 chip.
32 contains read-only attributes exposing some summarization
34 The Y in 'dieY' indicates the hardware id of the die on chip who
35 has chip id X.
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| D | sysfs-driver-w1_ds28e17 | 1 What: /sys/bus/w1/devices/19-<id>/speed
5 Description: When written, this file sets the I2C speed on the connected
6 DS28E17 chip. When read, it reads the current setting from
7 the DS28E17 chip.
14 What: /sys/bus/w1/devices/19-<id>/stretch
19 the busy timeout for I2C operations on the connected DS28E17
20 chip. When read, returns the current setting.
|
| /Documentation/core-api/ |
| D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
18 hardware details, so they can be used on different platforms without
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
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| /Documentation/security/tpm/ |
| D | tpm_tis.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 based on sequenced read and write operations, and the latter is based on a
11 FIFO (First-In-First-Out) interface is used by the tpm_tis_core dependent
13 memory mapped (aka MMIO) interface but it was later on extended to cover other
21 Communication is based on a 20 KiB buffer shared by the TPM chip through a
22 hardware bus or memory map, depending on the physical wiring. The buffer is
23 further split into five equal-size 4 KiB buffers, which provide equivalent
27 When the kernel wants to send commands to the TPM chip, it first reserves
29 cleared by the chip when the access is granted. Once it completes its
31 informs the chip that the locality has been relinquished.
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| /Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
18 The individual DRAM chips on a memory stick. These devices commonly
32 A physical connector on the motherboard that accepts a single memory
33 stick. Also called as "slot" on several datasheets.
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
50 of correcting more errors than on single mode.
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
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| /Documentation/misc-devices/ |
| D | bh1770glc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 - ROHM BH1770GLC
10 - OSRAM SFH7770
19 -----------
21 ALS and proximity parts operates on their own, but they shares common I2C
22 interface and interrupt logic. In principle they can run on their own,
25 ALS produces 16 bit lux values. The chip contains interrupt logic to produce
28 Proximity part contains IR-led driver up to 3 IR leds. The chip measures
35 Proximity low interrupt doesn't exists in the chip. This is simulated
41 Chip state is controlled via runtime pm framework when enabled in config.
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| D | apds990x.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 -----------
25 using clear channel only. Lux value and the threshold level on the HW
44 Driver controls chip operational state using pm_runtime framework.
45 Voltage regulators are controlled based on chip operational state.
48 -----
52 RO - shows detected chip type and version
55 RW - enable / disable chip. Uses counting logic
57 1 enables the chip
58 0 disables the chip
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| /Documentation/i2c/ |
| D | i2c-address-translators.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 -----------
16 with a modified slave address. The address used on the parent bus is
21 An ATR looks similar to an i2c-mux except:
22 - the address on the parent and child busses can be different
23 - there is normally no need to select the child port; the alias used on the
26 The ATR functionality can be provided by a chip with many other features.
27 The kernel i2c-atr provides a helper to implement an ATR within a driver.
29 The ATR creates a new I2C "child" adapter on each child bus. Adding
30 devices on the child bus ends up in invoking the driver code to select
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| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 1 Intersil ISL12057 I2C RTC/Alarm chip
8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
38 that the pinctrl-related properties below are given for completeness and
39 may not be required or may be different depending on your system or
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pmc.txt | 4 - compatible: "fsl,<chip>-pmc".
6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
7 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
11 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
15 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
16 apply to "fsl,mpc8641d-pmc".
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| /Documentation/sound/ |
| D | alsa-configuration.rst | 2 Advanced Linux Sound Architecture - Driver Configuration guide
16 If you want to support the WaveTable functionality on cards such as
21 and "Debug" options. To check for memory leaks, turn on "Debug memory"
38 ----------
47 limiting card index for auto-loading (1-8);
49 For auto-loading more than one card, specify this option
50 together with snd-card-X aliases.
63 Module snd-pcm-oss
64 ------------------
86 regarding opening the device. When this option is non-zero,
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr-channel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR channel with chip/rank topology description
13 amount of individual LPDDR chips and the ranks per chip.
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel
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| /Documentation/leds/ |
| D | leds-lp3944.rst | 5 * National Semiconductor LP3944 Fun-light Chip
21 -----------
22 The LP3944 is a helper chip that can drive up to 8 leds, with two programmable
29 - period:
31 - duty cycle:
32 percentage of the period the led is on, from 0 to 100
37 LP3944 can be found on Motorola A910 smartphone, where it drives the rgb
42 -----
43 The chip is used mainly in embedded contexts, so this driver expects it is
46 To register the chip at address 0x60 on adapter 0, set the platform data
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| /Documentation/hwmon/ |
| D | amc6821.rst | 19 -----------
21 This driver implements support for the Texas Instruments amc6821 chip.
22 The chip has one on-chip and one remote temperature sensor and one pwm fan
29 temp1_input ro on-chip temperature
57 combination of the on-chip temperature and
58 remote-sensor temperature,
72 temp1_auto_point2_temp rw The low-temperature limit of the proportional
81 which depend on temp1_auto_point2_temp and
89 temp2_auto_point2_temp rw The low-temperature limit of the proportional
97 values which depend on temp2_auto_point2_temp
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| D | w83793.rst | 10 Addresses scanned: I2C 0x2c - 0x2f
15 - Yuan Mu (Winbond Electronics)
16 - Rudolf Marek <r.marek@assembler.cz>
20 -----------------
26 settings. Use 'reset=1' to reset the chip when loading this module.
30 a certain chip. Typical usage is `force_subclients=0,0x2f,0x4a,0x4b`
31 to force the subclients of chip 0x2f on bus 0 to i2c addresses
36 -----------
43 (automatic fan speed control) on all temperature/PWM combinations, 2
44 sets of 6-pin CPU VID input.
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| D | adm1025.rst | 10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2d
24 * Only two possible addresses (0x2c - 0x2d).
29 - Chen-Yuan Wu <gwu@esoft.com>,
30 - Jean Delvare <jdelvare@suse.de>
33 -----------
36 monitor for microprocessor-based systems, providing measurement and limit
39 the processor core voltage. The ADM1025 can monitor a sixth power-supply
41 remote temperature-sensing diode and an on-chip temperature sensor allows
44 One specificity of this chip is that the pin 11 can be hardwired in two
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| /Documentation/devicetree/bindings/devfreq/event/ |
| D | samsung,exynos-nocp.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-nocp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos NoC (Network on Chip) Probe
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus.
16 that the Network on Chip (NoC) probes detects are transported over the
18 packets with header or data on the data request response network, or as
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| /Documentation/devicetree/bindings/mtd/ |
| D | raw-nand-chip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raw NAND Chip Common Properties
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
19 {size} bytes for a particular raw NAND chip.
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
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| D | st,stm32-fmc2-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc
28 - description: tx DMA channel
29 - description: rx DMA channel
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