Searched +full:one +full:- +full:time +full:- +full:programmable (Results 1 – 25 of 54) sorted by relevance
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| /Documentation/driver-api/ |
| D | ptp.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 - Set time
19 - Get time
20 - Shift the clock by a given offset atomically
21 - Adjust clock frequency
24 - Time stamp external events
25 - Period output signals configurable from user space
26 - Low Pass Filter (LPF) access from user space
27 - Synchronization of the Linux system time via the PPS subsystem
36 driver of asynchronous events (alarms and external time stamps) via
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| /Documentation/devicetree/bindings/iio/dac/ |
| D | adi,ad5758.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
19 spi-cpha: true
21 adi,dc-dc-mode:
25 Mode of operation of the dc-to-dc converter
31 Programmable Power Control (PPC)
32 In this mode, the VDPC+ voltage is user-programmable to a fixed level
36 voltage output at the VIOUT pin. Only one mode can be enabled at
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| /Documentation/devicetree/bindings/nvmem/ |
| D | lpc1850-otp.txt | 3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices.
6 - compatible: Should be "nxp,lpc1850-otp"
7 - reg: Must contain an entry with the physical base address and length
8 for each entry in reg-names.
9 - address-cells: must be set to 1.
10 - size-cells: must be set to 1.
16 compatible = "nxp,lpc1850-otp";
18 #address-cells = <1>;
19 #size-cells = <1>;
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| D | rockchip,otp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip internal OTP (One Time Programmable) memory
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-otp
16 - rockchip,rk3308-otp
17 - rockchip,rk3588-otp
26 clock-names:
29 - const: otp
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-lm3532.txt | 1 * Texas Instruments - lm3532 White LED driver with ambient light sensing
4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is
5 programmable over an I2C-compatible interface and has independent
11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear
13 1000:1 dimming ratio with programmable fade in and fade out settings.
16 - compatible : "ti,lm3532"
17 - reg : I2C slave address
18 - #address-cells : 1
19 - #size-cells : 0
22 - enable-gpios : gpio pin to enable (active high)/disable the device.
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| /Documentation/hwmon/ |
| D | lm78.rst | 6 * National Semiconductor LM78 / LM78-J
10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 - Frodo Looijaard <frodol@dds.nl>
29 - Jean Delvare <jdelvare@suse.de>
32 -----------
34 This driver implements support for the National Semiconductor LM78, LM78-J
38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line,
42 The LM7* implements one temperature sensor, three fan rotation speed sensors,
49 this case, alarms are issued during all the time when the actual temperature
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| D | lm87.rst | 10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2e
24 - Frodo Looijaard <frodol@dds.nl>,
25 - Philip Edelbrock <phil@netroedge.com>,
26 - Mark Studebaker <mdsxyz123@yahoo.com>,
27 - Stephen Rousset <stephen.rousset@rocketlogix.com>,
28 - Dan Eaton <dan.eaton@rocketlogix.com>,
29 - Jean Delvare <jdelvare@suse.de>,
30 - Original 2.6 port Jeff Oliver
33 -----------
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| D | adc128d818.rst | 17 -----------
22 The ADC128D818 implements one temperature sensor and seven voltage sensors.
24 Temperatures are measured in degrees Celsius. There is one set of limits.
27 Measurements are guaranteed between -55 and +125 degrees. The temperature
32 An alarm is triggered if the voltage has crossed a programmable minimum
40 already have disappeared by the time the alarm is read. The driver
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| D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
38 so they can't be used at the same time.
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
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| D | w83781d.rst | 10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83781d.pdf
18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83783s.pdf
34 Addresses scanned: I2C 0x28 - 0x2f
42 - Frodo Looijaard <frodol@dds.nl>,
43 - Philip Edelbrock <phil@netroedge.com>,
44 - Mark Studebaker <mdsxyz123@yahoo.com>
47 -----------------
67 -----------
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| D | ina2xx.rst | 10 Addresses: I2C 0x40 - 0x4f
20 Addresses: I2C 0x40 - 0x4f
30 Addresses: I2C 0x40 - 0x4f
40 Addresses: I2C 0x40 - 0x4f
50 Addresses: I2C 0x40 - 0x4f
59 -----------
61 The INA219 is a high-side current shunt and power monitor with an I2C
63 programmable conversion times and filtering.
75 The shunt value in micro-ohms can be set via platform data or device tree at
76 compile-time or via the shunt_resistor attribute in sysfs at run-time. Please
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| D | w83627ehf.rst | 22 * Winbond W83627DHG-P
46 * Winbond W83667HG-B
54 * Nuvoton NCT6775F/W83667HG-I
73 - Jean Delvare <jdelvare@suse.de>
74 - Yuan Mu (Winbond)
75 - Rudolf Marek <r.marek@assembler.cz>
76 - David Hubbard <david.c.hubbard@gmail.com>
77 - Gong Jun <JGong@nuvoton.com>
80 -----------
83 W83627DHG, W83627DHG-P, W83627UHG, W83667HG, W83667HG-B, W83667HG-I
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| D | nct6775.rst | 19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
83 * Nuvoton NCT6796D-S/NCT6799D-R
93 Guenter Roeck <linux@roeck-us.net>
96 -----------
107 one VID, alarms with beep warnings (control unimplemented), and some automatic
120 triggered if the rotation speed has dropped below a programmable limit. On
121 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
124 itself; specifically, it increases the divider value each time a fan speed
130 An alarm is triggered if the voltage has crossed a programmable minimum
138 The mode works for fan1-fan5.
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| /Documentation/watchdog/ |
| D | mlx-wdt.rst | 11 Mellanox watchdog device is implemented in a programmable logic device.
19 Get time-left isn't supported
23 a user-defined timeout.
25 Get time-left is supported.
38 Old systems still have only one main watchdog.
54 This mlx-wdt driver supports both HW watchdog implementations.
58 Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux),
61 version - type1 or type2.
66 Programmable logic device registers have little-endian order.
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-jz4780-efuse | 1 What: /sys/devices/*/<our-device>/nvmem
4 Description: read-only access to the efuse on the Ingenic JZ4780 SoC
5 The SoC has a one time programmable 8K efuse that is
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| D | sysfs-ptp | 41 Write integer to re-configure it.
47 This file contains the number of periodic or one shot
61 This file contains the number of programmable periodic
68 This file contains the number of programmable pins
88 This directory contains one file for each programmable
110 This write-only file enables or disables external
128 This write-only file enables or disables periodic
130 integers into the file: channel index, start time
131 seconds, start time nanoseconds, period seconds, and
139 This write-only file enables or disables delivery of
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| /Documentation/devicetree/bindings/fuse/ |
| D | renesas,rcar-otp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: R-Car E-FUSE connected to OTP_MEM
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 The E-FUSE is a type of non-volatile memory, which is accessible through the
14 One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs.
19 - renesas,r8a779g0-otp # R-CarV4H
20 - renesas,r8a779h0-otp # R-CarV4M
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
22 The programmable nature of the PRUs provide flexibility to implement custom
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| /Documentation/devicetree/bindings/sound/ |
| D | renesas,idt821034.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
14 programmable gain setting.
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the ALSA sound card node for
19 sub-nodes that involve the codec. The codec uses one 8bit time-slot per
21 'dai-tdm-tdm-slot-with' must be set to 8.
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| D | infineon,peb2466.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
20 'dai-tdm-tdm-slot-with' must be set to 8.
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| /Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
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| /Documentation/devicetree/bindings/display/ |
| D | atmel,lcdc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Dharma Balasubiramani <dharma.b@microchip.com>
15 from an external display buffer to a TFT LCD panel. The LCDC has one display
17 interface and a look-up table to allow palletized display configurations. The
18 LCDC is programmable on a per layer basis, and supports different LCD
26 - required: [ 'atmel,dmacon' ]
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| /Documentation/admin-guide/ |
| D | rtc.rst | 2 Real Time Clock (RTC) Drivers for Linux
5 When Linux developers talk about a "Real Time Clock", they usually mean
6 something that tracks wall clock time and is battery backed so that it
8 the local time zone or daylight savings time -- unless they dual boot
9 with MS-Windows -- but will instead be set to Coordinated Universal Time
10 (UTC, formerly "Greenwich Mean Time").
12 The newest non-PC hardware tends to just count seconds, like the time(2)
13 system call reports, but RTCs also very commonly represent time using
14 the Gregorian calendar and 24 hour time, as reported by gmtime(3).
16 Linux has two largely-compatible userspace RTC API families you may
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| /Documentation/devicetree/bindings/mtd/ |
| D | mtd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
21 User-defined MTD device name. Can be used to assign user friendly
26 '#address-cells':
29 '#size-cells':
36 - compatible
39 "@[0-9a-f]+$":
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| /Documentation/virt/kvm/x86/ |
| D | timekeeping.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
20 One of the most complicated parts of the X86 platform, and specifically,
23 time introduces a new set of challenges because it introduces a multiplexed
24 division of time beyond the control of the guest CPU.
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
44 One of the first timer devices available is the programmable interrupt timer,
46 channels which can be programmed to deliver periodic or one-shot interrupts.
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