Searched +full:opp +full:- +full:fuse +full:- +full:level (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Qualcomm OPP10 - Niklas Cassel <nks@flawful.org>13 - $ref: opp-v2-base.yaml#17 const: operating-points-v2-qcom-level20 '^opp-?[0-9]+$':25 opp-level: true[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Niklas Cassel <nks@flawful.org>14 or other device. Each OPP of a device corresponds to a "corner" that has23 - enum:24 - qcom,qcs404-cpr25 - const: qcom,cpr36 - description: Reference clock.38 clock-names:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Ilia Lin <ilia.lin@kernel.org>17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level18 according to the required OPPs defined in the CPU OPP tables.20 For old implementation efuses are parsed to select the correct opp table and28 - qcom,apq806429 - qcom,apq8096[all …]