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/Documentation/devicetree/bindings/gpu/host1x/
Dnvidia,tegra234-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra234-nvdec
32 clock-names:
34 - const: nvdec
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/Documentation/firmware-guide/acpi/
Dchromeos-acpi-device.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Chrome OS ACPI Device
7 Hardware functionality specific to Chrome OS is exposed through a Chrome OS ACPI device.
8 The plug and play ID of a Chrome OS ACPI device is GGL0001 and the hardware ID is
11 .. flat-table:: Supported ACPI Objects
13 :header-rows: 1
15 * - Object
16 - Description
18 * - CHSW
19 - Chrome OS switch positions
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/Documentation/livepatch/
Dmodule-elf-format.rst16 Formerly, livepatch required separate architecture-specific code to write
17 relocations. However, arch-specific code to write relocations already
19 code. So, instead of duplicating code and re-implementing what the module
20 loader can already do, livepatch leverages existing code in the module
21 loader to perform the all the arch-specific relocation work. Specifically,
26 of arch-specific code required to port livepatch to a particular
34 selected from OS-specific ranges according to the definitions from glibc.
37 -----------------------------------------------------
39 reference non-exported global symbols and non-included local symbols.
40 Relocations referencing these types of symbols cannot be left in as-is
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/Documentation/core-api/
Dthis_cpu_ops.rst14 this_cpu operations add a per cpu variable offset to the processor
19 the offset and the operation on the data. Therefore it is not
24 Read-modify-write operations are of particular interest. Frequently
65 ------------------------------------
111 surrounding code this_cpu_inc() will only guarantee that one of the
113 guarantee that the OS will not move the process directly before or
121 the same code paths. Since each processor has its own per cpu
128 ------------------
134 Takes the offset of a per cpu variable (&x !) and returns the address
138 available. Instead, the offset of the local per cpu area is simply
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/Documentation/devicetree/bindings/cache/
Dl2c2x0.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
16 models (Note 1). Some of the properties that are just prefixed "cache-*" are
22 cache controllers as found in e.g. Cortex-A15/A7/A57/A53. These
24 early secure boot code. Thus no need to deal with their configuration
28 - $ref: /schemas/cache-controller.yaml#
33 - enum:
34 - arm,pl310-cache
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/Documentation/devicetree/bindings/i2c/
Di2c-pxa-pci-ce4100.txt2 ----------
4 CE4100 has one PCI device which is described as the I2C-Controller. This
5 PCI device has three PCI-bars, each bar contains a complete I2C
6 controller. So we have a total of three independent I2C-Controllers
8 The driver is probed via the PCI-ID and is gathering the information of
10 Grant Likely recommended to use the ranges property to map the PCI-Bar
21 offset from be base of the BAR (which would be
22 non-zero if you had 2 or more devices mapped off
26 in a way that the OS can interpret without
27 requiring custom device driver code.
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/Documentation/driver-api/gpio/
Ddriver.rst25 number, sometime also referred to as ``offset``, which is a unique number
26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
58 driver code:
60 - methods to establish GPIO line direction
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/Documentation/devicetree/bindings/gpio/
Dnvidia,tegra186-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
31 Code that wishes to configure access to the GPIO registers needs access
32 to these registers to do so. Code which simply wishes to read or write
52 port, and the mapping from port name to register offset within a
53 controller, are both extremely non-linear. The header file
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/Documentation/userspace-api/media/drivers/
Duvcvideo.rst1 .. SPDX-License-Identifier: GPL-2.0
6 This file documents some driver-specific aspects of the UVC driver, such as
7 driver-specific ioctls and implementation notes.
10 linux-media@vger.kernel.org.
14 ---------------------------
19 The UVC specification allows for vendor-specific extensions through extension
23 - through mappings of XU controls to V4L2 controls
24 - through a driver-specific ioctl interface
30 The second mechanism requires uvcvideo-specific knowledge for the application to
40 The UVC driver provides an API for user space applications to define so-called
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/Documentation/filesystems/
Dext2.rst1 .. SPDX-License-Identifier: GPL-2.0
12 for NetBSD, FreeBSD, the GNU HURD, Windows 95/98/NT, OS/2 and RISC OS.
18 set using tune2fs(8). Kernel-determined defaults are indicated by (*).
34 errors=remount-ro Remount the filesystem read-only on an error.
40 nouid32 Use 16-bit UIDs and GIDs.
84 ------
93 ------------
110 --------------
114 offset of 1024 bytes from the start of the device, and it is essential
129 and which OS created it.
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Dzonefs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ZoneFS - Zone filesystem for Zoned block devices
11 as a file. Unlike a regular POSIX-compliant file system with native zoned block
18 than to a full-featured POSIX file system. The goal of zonefs is to simplify
22 example of this approach is the implementation of LSM (log-structured merge)
31 -------------------
62 by sub-directories. This file structure is built entirely using zone information
63 provided by the device and so does not require any complex on-disk metadata
66 On-disk metadata
67 ----------------
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Dcoda.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Coda Kernel-Venus Interface
10 Coda -- this document describes the client kernel-Venus interface.
35 level filesystem code needed for the operation of the Coda file sys-
124 leads to an almost natural environment for implementing a kernel-level
142 traps to the OS kernel. Examples of such calls trapping to the kernel
153 pre-processing, the VFS starts invoking exported routines in the FS
155 request starts, and here the Coda specific kernel code comes into
208 up processes. The Coda FS driver processes VFS- and pioctl-requests
220 memory for the request. Since the data buffer is re-used to hold the
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/Documentation/driver-api/thermal/
Dintel_dptf.rst1 .. SPDX-License-Identifier: GPL-2.0
12 ------------
31 ----------------------------
43 "42A441D6-AE6A-462b-A84B-4A8CE79027D3" : Passive 1
45 "3A95C389-E4B8-4629-A526-C52C88626BAE" : Active
47 "97C68AE7-15FA-499c-B8C9-5DA81D606E0A" : Critical
49 "63BE270F-1C11-48FD-A6F7-3AF253FF3E2D" : Adaptive performance
51 "5349962F-71E6-431D-9AE8-0A635B710AEE" : Emergency call
53 "9E04115A-AE87-4D1C-9500-0F3E340BFE75" : Passive 2
55 "F5A35014-C209-46A4-993A-EB56DE7530A1" : Power Boss
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/Documentation/admin-guide/device-mapper/
Dverity.rst2 dm-verity
5 Device-Mapper's "verity" target provides transparent integrity checking of
7 This target is read-only.
21 This is the type of the on-disk hash format.
23 0 is the original format used in the Chromium OS.
40 dm-verity device.
55 This is the offset, in <hash_block_size>-blocks, from the start of hash_dev
110 is M-N.
116 fec_start <offset>
117 This is the offset, in <data_block_size> blocks, from the start of the
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/Documentation/staging/
Dremoteproc.rst10 of operating system, whether it's Linux or any other flavor of real-time OS.
12 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
13 In a typical configuration, the dual cortex-A9 is running Linux in a SMP
22 platform-specific remoteproc drivers only need to provide a few low-level
24 (for more information about the virtio-based rpmsg bus and its drivers,
118 name of this remote processor, platform-specific ops handlers,
154 This is called by the platform-specific rproc implementation, whenever
157 Returns 0 on success and an appropriate error code otherwise.
180 Returns 0 on success and -EINVAL if @rproc isn't valid.
190 non-remoteproc driver. This function can be called from atomic/interrupt
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/Documentation/admin-guide/kdump/
Dvmcoreinfo.rst11 section and used by user-space tools like crash and makedumpfile to
18 ------------------------
21 code from which the kernel has been built. For example, crash uses it to
25 ---------
32 -----------
39 User-space tools can get the kernel name, host name, kernel release
40 number, kernel version, architecture name and OS type from it.
43 ---------------------
45 Offset of the name's member. Crash Utility and Makedumpfile get
49 ---------------
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/Documentation/scsi/
DChangeLog.lpfc2 * Please read the associated RELEASE-NOTES file !!!
8 * Fixed build warning for 2.6.12-rc2 kernels: mempool_alloc now
19 * Removed FC_TRANSPORT_PATCHESxxx defines. They're in 2.6.12-rc1.
22 than SLI return code.
26 * Added PCI ID for LP10000-S.
31 * Zero-out response sense length in lpfc_scsi_prep_cmnd to prevent
33 - was causing spurious 0710 messages.
55 - stop using volatile. if you need special ordering use memory
57 - switch lpfc_sli_pcimem_bcopy to take void * arguments.
58 - remove typecast for constants - a U postfix marks them
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Daic79xx.rst1 .. SPDX-License-Identifier: GPL-2.0
28 AIC-7901A Single Channel 64-bit PCI-X 133MHz to
30 AIC-7901B Single Channel 64-bit PCI-X 133MHz to
32 AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to
34 AIC-7902B Dual Channel 64-bit PCI-X 133MHz to
41 Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B
43 68-pin, two internal 68-pin)
44 Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B
46 68-pin, two internal 68-pin)
47 Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4
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Dscsi_mid_low_api.rst1 .. SPDX-License-Identifier: GPL-2.0
4 SCSI mid_level - lower_level driver interface
14 (SCSI terminology, see SAM-3 at http://www.t10.org) sends SCSI commands
22 Examples are the usb-storage driver (found in the drivers/usb/storage
30 HBAs. These HBAs might be either on PCI daughter-boards or built into
33 has its own PCI device address. [The one-to-one correspondence between
49 documented in Documentation/scsi (e.g. aic7xxx.rst). The SCSI mid-level is
53 scsi-generic.rst (for the sg driver).
55 Some documentation (or URLs) for LLDs may be found in the C source code
56 or in the same directory as the C source code. For example to find a URL
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Dsym53c8xx_2.rst1 .. SPDX-License-Identifier: GPL-2.0
4 SYM-2 driver
11 95170 DEUIL LA BARRE - FRANCE
15 2004-10-09
67 This driver supports the whole SYM53C8XX family of PCI-SCSI controllers.
68 It also support the subset of LSI53C10XX PCI-SCSI controllers that are based
71 It replaces the sym53c8xx+ncr53c8xx driver bundle and shares its core code
72 with the FreeBSD SYM-2 driver. The 'glue' that allows this driver to work
81 - Wolfgang Stanglmeier <wolf@cologne.de>
82 - Stefan Esser <se@mi.Uni-Koeln.de>
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/Documentation/arch/sparc/oradax/
Doracle-dax.rst17 code sufficient to write user or kernel applications that use DAX
25 the accompanying document, dax-hv-api.txt, which is a plain text
27 Specification" version 3.0.20+15, dated 2017-09-25.
38 requests to the available coprocessor execution units. A status code
86 made accessible via mmap(), and are read-only for the application.
109 equal to the number of bytes given in the call. Otherwise -1 is
113 -----------
122 --------
129 --------
138 ---------------------------------------------
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/Documentation/networking/device_drivers/ethernet/intel/
Diavf.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2013-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Additional Configurations
16 - Known Issues/Troubleshooting
17 - Support
30 The guest OS loading the iavf driver must support MSI-X interrupts.
53 ---------------------
58 # dmesg -n 8
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/Documentation/filesystems/iomap/
Doperations.rst1 .. SPDX-License-Identifier: GPL-2.0
35 linked lists of buffer heads instead of the per-folio bitmaps that iomap
42 -----------------------------------
61 --------------------------
63 The ``->iomap_begin`` function for pagecache operations may set the
67 .. code-block:: c
79 - ``get_folio``: Called to allocate and return an active reference to
83 This could be used to `set up per-folio filesystem state
84 <https://lore.kernel.org/all/20190429220934.10415-5-agruenba@redhat.com/>`_
87 - ``put_folio``: Called to unlock and put a folio after a pagecache
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/Documentation/filesystems/ext4/
Dsuper.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------
21 .. list-table::
23 :header-rows: 1
25 * - Offset
26 - Size
27 - Name
28 - Description
29 * - 0x0
30 - __le32
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/Documentation/admin-guide/
Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
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