Searched +full:pclk +full:- +full:sample (Results 1 – 25 of 32) sorted by relevance
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| /Documentation/devicetree/bindings/media/ |
| D | st,stm32-dcmipp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hugues Fruchet <hugues.fruchet@foss.st.com> 11 - Alain Volmat <alain.volmat@foss.st.com> 15 const: st,stm32mp13-dcmipp 30 $ref: /schemas/graph.yaml#/$defs/port-base 37 $ref: video-interfaces.yaml# 41 bus-type: [all …]
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| D | allwinner,sun4i-a10-csi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 13 description: |- 20 - const: allwinner,sun4i-a10-csi1 21 - const: allwinner,sun7i-a20-csi0 22 - items: [all …]
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| D | marvell,mmp2-ccic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 15 pattern: '^camera@[a-f0-9]+$' 18 const: marvell,mmp2-ccic 26 power-domains: 30 $ref: /schemas/graph.yaml#/$defs/port-base 35 $ref: video-interfaces.yaml# [all …]
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| D | st,stm32-dcmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hugues Fruchet <hugues.fruchet@foss.st.com> 14 const: st,stm32-dcmi 25 clock-names: 27 - const: mclk 32 dma-names: 34 - const: tx [all …]
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| D | atmel,isc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 2 # Copyright (C) 2016-2021 Microchip Technology, Inc. 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Eugen Hristev <eugen.hristev@microchip.com> 22 const: atmel,sama5d2-isc 34 clock-names: 36 - const: hclock 37 - const: iscck 38 - const: gck [all …]
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| D | allwinner,sun6i-a31-csi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - allwinner,sun6i-a31-csi 17 - allwinner,sun8i-a83t-csi 18 - allwinner,sun8i-h3-csi 19 - allwinner,sun8i-v3s-csi [all …]
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| D | pxa-camera.txt | 4 - compatible: Should be "marvell,pxa270-qci" 5 - reg: register base and size 6 - interrupts: the interrupt number 7 - any required generic properties defined in video-interfaces.txt 10 - clocks: input clock (see clock-bindings.txt) 11 - clock-output-names: should contain the name of the clock driving the 13 - clock-frequency: host interface is driving MCLK, and MCLK rate is this rate 18 compatible = "marvell,pxa270-qci"; 23 clock-names = "ciclk"; 24 clock-frequency = <50000000>; [all …]
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| D | atmel-isi.txt | 2 ---------------------------------- 5 - compatible: must be "atmel,at91sam9g45-isi" or "microchip,sam9x60-isi". 6 - reg: physical base address and length of the registers set for the device. 7 - interrupts: should contain IRQ line for the ISI. 8 - clocks: list of clock specifiers, corresponding to entries in the clock-names 9 property; please refer to clock-bindings.txt. 10 - clock-names: required elements: "isi_clk". 11 - pinctrl-names, pinctrl-0: please refer to pinctrl-bindings.txt. 15 defined in Documentation/devicetree/bindings/media/video-interfaces.txt. 18 ------------------------ [all …]
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| D | ti,da850-vpif.txt | 2 ---------------------- 12 - compatible: must be "ti,da850-vpif" 13 - reg: physical base address and length of the registers set for the device; 14 - interrupts: should contain IRQ line for the VPIF 18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a 19 single 16-bit channel. It should contain one or two port child nodes 23 Documentation/devicetree/bindings/media/video-interfaces.txt. 25 Example using 2 8-bit input channels, one of which is connected to an 26 I2C-connected TVP5147 decoder: 29 compatible = "ti,da850-vpif"; [all …]
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| D | microchip,xisc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Eugen Hristev <eugen.hristev@microchip.com> 25 const: microchip,sama7g5-isc 36 clock-names: 38 - const: hclock 40 '#clock-cells': 43 clock-output-names: 44 const: isc-mck [all …]
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | mt9m111.txt | 4 array size of 1280H x 1024V. It is programmable through a simple two-wire serial 8 - compatible: value should be "micron,mt9m111" 9 - clocks: reference to the master clock. 10 - clock-names: shall be "mclk". 13 sub-node for its digital output video port, in accordance with the video 15 Documentation/devicetree/bindings/media/video-interfaces.txt 18 - pclk-sample: For information see ../video-interfaces.txt. The value is set to 28 clock-names = "mclk"; 32 remote-endpoint = <&pxa_camera>; 33 pclk-sample = <1>;
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| D | tvp514x.txt | 3 The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip 5 video formats into digital video component. The tvp514x decoder supports analog- 6 to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D 7 conversion and decoding of NTSC, PAL and SECAM composite and S-video into 11 - compatible : value should be either one among the following 17 - hsync-active: HSYNC Polarity configuration for endpoint. 19 - vsync-active: VSYNC Polarity configuration for endpoint. 21 - pclk-sample: Clock polarity of the endpoint. 24 media/video-interfaces.txt. 37 hsync-active = <1>; [all …]
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| D | tvp7002.txt | 7 - compatible : Must be "ti,tvp7002" 10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when 13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when 16 - pclk-sample: Clock polarity of the bus. Default value when this property is 19 - sync-on-green-active: Active state of Sync-on-green signal property of the 24 - field-even-active: Active-high Field ID output polarity control of the bus. 31 video-interfaces.txt. 44 hsync-active = <1>; 45 vsync-active = <1>; 46 pclk-sample = <0>; [all …]
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| D | galaxycore,gc0308.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 18 - $ref: /schemas/media/video-interface-devices.yaml# 23 - const: galaxycore,gc0308 24 - items: 25 - const: galaxycore,gc0309 26 - const: galaxycore,gc0308 35 reset-gpios: [all …]
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| D | ti,ds90ub913.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments DS90UB913 FPD-Link III Serializer 10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 13 The TI DS90UB913 is an FPD-Link III video serializer for parallel video. 18 - ti,ds90ub913a-q1 20 '#gpio-cells': 27 gpio-controller: true 34 clock-names: [all …]
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| D | ovti,ov772x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo@jmondi.org> 20 - ovti,ov7720 21 - ovti,ov7725 29 reset-gpios: 34 powerdown-gpios: 40 $ref: /schemas/graph.yaml#/$defs/port-base 46 $ref: /schemas/media/video-interfaces.yaml# [all …]
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| D | ovti,ov5642.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <festevam@gmail.com> 13 - $ref: /schemas/media/video-interface-devices.yaml# 25 AVDD-supply: 28 DVDD-supply: 31 DOVDD-supply: 34 powerdown-gpios: 38 reset-gpios: [all …]
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| D | aptina,mt9p031.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor 15 simple two-wire serial interface. 20 - aptina,mt9p006 21 - aptina,mt9p031 22 - aptina,mt9p031m [all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | amlogic,axg-tdm-formatters.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jerome Brunet <jbrunet@baylibre.com> 15 - amlogic,g12a-tdmout 16 - amlogic,sm1-tdmout 17 - amlogic,axg-tdmout 18 - amlogic,g12a-tdmin 19 - amlogic,sm1-tdmin [all …]
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| D | atmel,sama5d2-pdmic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Claudiu Beznea <claudiu.beznea@microchip.com> 16 that decodes an incoming PDM sample stream. 20 const: atmel,sama5d2-pdmic 30 - description: peripheral clock 31 - description: generated clock 33 clock-names: [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | amlogic,axg-audio-clkc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/amlogic,axg-audio-clkc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 11 - Jerome Brunet <jbrunet@baylibre.com> 21 - amlogic,axg-audio-clkc 22 - amlogic,g12a-audio-clkc 23 - amlogic,sm1-audio-clkc 25 '#clock-cells': [all …]
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | ti,tfp410.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tomi Valkeinen <tomi.valkeinen@ti.com> 11 - Jyri Sarha <jsarha@ti.com> 21 powerdown-gpios: 26 Data de-skew value in 350ps increments, from 0 to 7, as configured 27 through the DK[3:1] pins. The de-skew multiplier is computed as 28 (DK[3:1] - 4), so it ranges from -4 to 3. 38 $ref: /schemas/graph.yaml#/$defs/port-base [all …]
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| D | lvds-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple 21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February 28 Those devices have been marketed under the FPD-Link and FlatLink brand names 34 - items: 35 - enum: [all …]
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| /Documentation/devicetree/bindings/spi/ |
| D | snps,dw-apb-ssi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Brown <broonie@kernel.org> 13 - $ref: spi-controller.yaml# 14 - if: 19 - mscc,ocelot-spi 20 - mscc,jaguar2-spi 25 - if: [all …]
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| /Documentation/admin-guide/media/ |
| D | mgb4.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 --------------- 13 There are two types of parameters - global / PCI card related, found under 23 | 0 - No module present 24 | 1 - FPDL3 25 | 2 - GMSL 33 | 1 - FPDL3 34 | 2 - GMSL 42 PRODUCT-REVISION-SERIES-SERIAL 55 | 0 - single [all …]
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