Searched +full:per +full:- +full:context (Results 1 – 25 of 184) sorted by relevance
12345678
| /Documentation/translations/it_IT/doc-guide/ |
| D | kernel-doc.rst | 1 .. include:: ../disclaimer-ita.rst
3 .. note:: Per leggere la documentazione originale in inglese:
4 :ref:`Documentation/doc-guide/index.rst <doc_guide>`
6 .. title:: Commenti in kernel-doc
11 Scrivere i commenti in kernel-doc
15 strutturanti secondo il formato kernel-doc. Essi possono descrivere funzioni,
18 .. note:: Il formato kernel-doc può sembrare simile a gtk-doc o Doxygen ma
19 in realtà è molto differente per ragioni storiche. I sorgenti del kernel
20 contengono decine di migliaia di commenti kernel-doc. Siete pregati
23 La struttura kernel-doc è estratta a partire dai commenti; da questi viene
[all …]
|
| /Documentation/mm/ |
| D | page_frags.rst | 5 A page fragment is an arbitrary-length arbitrary-offset area of memory
13 memory for use as either an sk_buff->head, or to be used in the "frags"
22 either a per-cpu limitation, or a per-cpu limitation and forcing interrupts
25 The network stack uses two separate caches per CPU to handle fragment
29 main difference between these two calls is the context in which they may be
30 called. The "netdev" prefixed functions are usable in any context as these
32 only usable within the softirq context.
41 avoid calling get_page per allocation.
|
| /Documentation/arch/powerpc/ |
| D | cxl.rst | 17 Coherent in this context means that the accelerator and CPUs can
28 +----------+ +---------+
34 +----------+ +---------+
36 | +------+ | PSL |
37 | | CAPP |<------>| |
38 +---+------+ PCIE +---------+
62 the fault. The context to which this fault is serviced is based on
65 - POWER8 and PSL Version 8 are compliant to the CAIA Version 1.0.
66 - POWER9 and PSL Version 9 are compliant to the CAIA Version 2.0.
85 When using dedicated mode only one MMU context is supported. In
[all …]
|
| D | cxlflash.rst | 12 purpose co-processors which can read or write an application's
40 - Any flash device (LUN) can be configured to be accessed as a
43 - Any flash device (LUN) can be configured to be accessed from
47 or physical LUN access) or access to a kernel/AFU-mediated
56 concept of a master context. A master typically has special privileges
63 The CXL Flash Adapter Driver establishes a master context with the
67 +-------------------------------+
69 | (per context) |
71 +-------------------------------+
72 | 512 * 128 B per context |
[all …]
|
| /Documentation/core-api/ |
| D | local_ops.rst | 29 Local atomic operations are meant to provide fast and highly reentrant per CPU
34 Having fast per CPU atomic counters is interesting in many cases: it does not
41 CPU writes to the ``local_t`` data. This is done by using per cpu data and
42 making sure that we modify it from within a preemption safe context. It is
54 ``asm-generic/local.h`` in your architecture's ``local.h`` is sufficient.
66 * Variables touched by local ops must be per cpu variables.
68 * This CPU can use local ops from any context (process, irq, softirq, nmi, ...)
71 process context to make sure the process won't be migrated to a
72 different CPU between getting the per-cpu variable and doing the
74 * When using local ops in interrupt context, no special care must be
[all …]
|
| D | this_cpu_ops.rst | 8 this_cpu operations are a way of optimizing access to per cpu
11 the cpu permanently stored the beginning of the per cpu area for a
14 this_cpu operations add a per cpu variable offset to the processor
15 specific per cpu base and encode that operation in the instruction
16 operating on the per cpu variable.
24 Read-modify-write operations are of particular interest. Frequently
32 synchronization is not necessary since we are dealing with per cpu
37 Please note that accesses by remote processors to a per cpu area are
65 ------------------------------------
68 per cpu area. It is then possible to simply use the segment override
[all …]
|
| D | workqueue.rst | 13 There are many cases where an asynchronous process execution context
17 When such an asynchronous execution context is needed, a work item
19 independent thread serves as the asynchronous execution context. The
32 worker thread per CPU and a single threaded (ST) wq had one worker
33 thread system-wide. A single MT wq needed to keep around the same
42 worker pool. An MT wq could provide only one execution context per CPU
45 including proneness to deadlocks around the single execution context.
60 * Use per-CPU unified worker pools shared by all wq to provide
80 A work item can be executed in either a thread or the BH (softirq) context.
85 worker-pools.
[all …]
|
| /Documentation/userspace-api/ |
| D | unshare.rst | 10 ----------
14 --------
26 -----------
37 outside the confinement of all-or-nothing shared resources of legacy
45 Al Viro in the August of 2000, on the Linux-Kernel mailing list, as part
53 -----------
59 even non-threaded applications if they have a need to disassociate
60 from default shared namespace. The following lists two use-cases
63 2.1 Per-security context namespaces
67 the kernel's per-process namespace mechanism. Polyinstantiated directories,
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | sifive,plic-1.0.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive Platform-Level Interrupt Controller (PLIC)
11 SiFive SoCs and other RISC-V SoCs include an implementation of the
12 Platform-Level Interrupt Controller (PLIC) high-level specification in
13 the RISC-V Privileged Architecture specification. The PLIC connects all
17 A hart context is a privilege mode in a hardware execution thread. For example,
18 in an 4 core system with 2-way SMT, you have 8 harts and probably at least two
[all …]
|
| /Documentation/timers/ |
| D | highres.rst | 8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
[all …]
|
| /Documentation/trace/ |
| D | timerlat-tracer.rst | 6 find sources of wakeup latencies of real-time threads. Like cyclictest,
13 -----
28 # _-----=> irqs-off
29 # / _----=> need-resched
30 # | / _---=> hardirq/softirq
31 # || / _--=> preempt-depth
34 # TASK-PID CPU# |||| TIMESTAMP ID CONTEXT LATENCY
36 <idle>-0 [000] d.h1 54.029328: #1 context irq timer_latency 932 ns
37 <...>-867 [000] .... 54.029339: #1 context thread timer_latency 11700 ns
38 <idle>-0 [001] dNh1 54.029346: #1 context irq timer_latency 2833 ns
[all …]
|
| /Documentation/devicetree/bindings/timer/ |
| D | arm,twd-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,twd-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Timer-Watchdog Timer
10 - Rob Herring <robh@kernel.org>
13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
14 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer
17 The TWD is usually attached to a GIC to deliver its two per-processor
23 - arm,cortex-a9-twd-timer
[all …]
|
| /Documentation/accounting/ |
| D | taskstats-struct.rst | 34 4) Per-task and per-thread context switch count statistics
69 /* The scheduling discipline as set in task->policy field. */
90 /* The minor page fault count of a task, as set in task->min_flt. */
93 /* The major page fault count of a task, as set in task->maj_flt. */
118 /* Following four fields atomically updated using task->delays->lock */
130 /* cpu "wall-clock" running time
153 /* Accumulated RSS usage in duration of a task, in MBytes-usecs.
157 * average usage per system time unit can be calculated.
159 __u64 coremem; /* accumulated RSS usage in MB-usec */
164 __u64 virtmem; /* accumulated VM usage in MB-usec */
[all …]
|
| /Documentation/userspace-api/accelerators/ |
| D | ocxl.rst | 6 at being low-latency and high-bandwidth. The specification is
14 OpenCAPI is known in linux as 'ocxl', as the open, processor-agnostic
20 High-level view
29 +-----------+ +-------------+
33 | | +--------+ | Unit | +--------+
34 | |--| Memory | | (AFU) |--| Memory |
35 | | +--------+ | | +--------+
36 +-----------+ +-------------+
38 +-----------+ +-------------+
40 +-----------+ +-------------+
[all …]
|
| /Documentation/admin-guide/ |
| D | perf-security.rst | 7 --------
29 3. Content of kernel software counters (e.g., for context switches, page
34 uncore counters) without direct attribution to any execution context
37 4. Content of architectural execution context registers (e.g., RIP, RSP,
44 of execution context registers or data from process memory then access
50 -------------------------------
66 independently enabled and disabled on per-thread basis for processes and
103 ---------------------------------
105 Mechanisms of capabilities, privileged capability-dumb files [6]_,
118 # ls -alhF
[all …]
|
| /Documentation/networking/ |
| D | scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
35 Multi-queue distribution can also be used for traffic prioritization, but
[all …]
|
| /Documentation/locking/ |
| D | preempt-locking.rst | 2 Proper Locking Under a Preemptible Kernel: Keeping Kernel Code Preempt-Safe
21 RULE #1: Per-CPU data structures need explicit protection
32 First, since the data is per-CPU, it may not have explicit SMP locking, but
44 Under preemption, the state of the CPU must be protected. This is arch-
45 dependent, but includes CPU structures and state not preserved over a context
48 if the kernel is executing a floating-point instruction and is then preempted.
84 n-times in a code path, and preemption will not be reenabled until the n-th
93 disabling preemption - any cond_resched() or cond_resched_lock() might trigger
95 reschedule. So use this implicit preemption-disabling property only if you
102 cpucache_t *cc; /* this is per-CPU */
[all …]
|
| D | locktypes.rst | 1 .. SPDX-License-Identifier: GPL-2.0
15 - Sleeping locks
16 - CPU local locks
17 - Spinning locks
27 --------------
29 Sleeping locks can only be acquired in preemptible task context.
39 - mutex
40 - rt_mutex
41 - semaphore
42 - rw_semaphore
[all …]
|
| /Documentation/block/ |
| D | inline-encryption.rst | 1 .. SPDX-License-Identifier: GPL-2.0
19 keys directly in low-level I/O requests. However, most inline encryption
22 low-level I/O request then just contains a keyslot index and data unit number.
30 Inline encryption hardware is also very different from "self-encrypting drives",
31 such as those based on the TCG Opal or ATA Security standards. Self-encrypting
32 drives don't provide fine-grained control of encryption and provide no way to
34 provides fine-grained control of encryption, including the choice of key and
43 layered devices like device-mapper and loopback (i.e. we want to be able to use
50 - We need a way for upper layers (e.g. filesystems) to specify an encryption
51 context to use for en/decrypting a bio, and device drivers (e.g. UFSHCD) need
[all …]
|
| /Documentation/filesystems/ |
| D | netfs_library.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 - Overview.
10 - Per-inode context.
11 - Inode context helper functions.
12 - Buffered read helpers.
13 - Read helper functions.
14 - Read helper structures.
15 - Read helper operations.
16 - Read helper procedure.
17 - Read helper cache API.
[all …]
|
| /Documentation/gpu/rfc/ |
| D | i915_vm_bind.rst | 18 User has to opt-in for VM_BIND mode of binding for an address space (VM)
34 ------------------------
42 -------------------------------
52 "dma-buf: Add an API for exporting sync files"
63 default gem context and many more (See struct drm_i915_gem_execbuffer3).
68 be using the i915_vma active reference tracking. It will instead use dma-resv
78 -------------------
79 By default, BOs can be mapped on multiple VMs and can also be dma-buf
82 dma-resv fence list of all shared BOs mapped on the VM.
87 the VM they are private to and can't be dma-buf exported.
[all …]
|
| /Documentation/filesystems/nfs/ |
| D | rpc-server-gss.rst | 13 - RFC2203 v1: https://tools.ietf.org/rfc/rfc2203.txt
14 - RFC5403 v2: https://tools.ietf.org/rfc/rfc5403.txt
18 - RFC7861 v3: https://tools.ietf.org/rfc/rfc7861.txt
35 - initial context establishment
36 - integrity/privacy protection (signing and encrypting of individual
39 The former is more complex and policy-independent, but less
40 performance-sensitive. The latter is simpler and needs to be very fast.
42 Therefore, we perform per-packet integrity and privacy protection in the
43 kernel, but leave the initial context establishment to userspace. We
44 need upcalls to request userspace to perform context establishment.
[all …]
|
| /Documentation/security/keys/ |
| D | request-key.rst | 45 The main difference between the access points is that the in-kernel interface
50 The request_key_tag() call is like the in-kernel request_key(), except that it
57 mechanism rather than using /sbin/request-key.
70 forking and execution of /sbin/request-key.
92 is the context in which key U should be instantiated and secured, and
95 4) request_key() then forks and executes /sbin/request-key with a new session
98 5) /sbin/request-key assumes the authority associated with key U.
100 6) /sbin/request-key execs an appropriate program to perform the actual
103 7) The program may want to access another key from A's context (say a
122 be created uninstantiated, another auth key (X) would be created (as per step
[all …]
|
| /Documentation/security/ |
| D | credentials.rst | 20 - Tasks
21 - Files/inodes
22 - Sockets
23 - Message queues
24 - Shared memory segments
25 - Semaphores
26 - Keys
40 3. The objective context.
43 indicates the 'objective context' of that object. This may or may not be
44 the same set as in (2) - in standard UNIX files, for instance, this is the
[all …]
|
| /Documentation/admin-guide/mm/damon/ |
| D | usage.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 - *DAMON user space tool.*
11 system administrators who want a just-working human-friendly interface.
12 Using this, users can use the DAMON’s major features in a human-friendly way.
16 - *sysfs interface.*
23 - *Kernel Space Programming Interface.*
29 - *debugfs interface. (DEPRECATED!)*
34 linux-mm@kvack.org.
57 ---------------
60 figure, parents-children relations are represented with indentations, each
[all …]
|
12345678