Searched +full:per +full:- +full:core (Results 1 – 25 of 513) sorted by relevance
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,axi-fan-control.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/hwmon/adi,axi-fan-control.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Nuno Sá <nuno.sa@analog.com> 15 core can be found in: 22 - adi,axi-fan-control-1.00.a 33 pulses-per-revolution: 35 Value specifying the number of pulses per revolution of the controlled 41 - compatible [all …]
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| D | pwm-fan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwmon/pwm-fan.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jean Delvare <jdelvare@suse.com> 11 - Guenter Roeck <linux@roeck-us.net> 15 const: pwm-fan 17 cooling-levels: 19 $ref: /schemas/types.yaml#/definitions/uint32-array 23 fan-supply: [all …]
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| /Documentation/devicetree/bindings/watchdog/ |
| D | arm,twd-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/arm,twd-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Timer-Watchdog Watchdog 10 - Rob Herring <robh@kernel.org> 13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core 14 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer 17 The TWD is usually attached to a GIC to deliver its two per-processor 23 - arm,cortex-a9-twd-wdt [all …]
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| /Documentation/devicetree/bindings/arm/omap/ |
| D | l4.txt | 6 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus 7 Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus 8 Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus 9 Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus 10 Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus 11 Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus 12 Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus 13 Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus 14 Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus 15 Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus [all …]
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| /Documentation/devicetree/bindings/timer/ |
| D | arm,twd-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/arm,twd-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Timer-Watchdog Timer 10 - Rob Herring <robh@kernel.org> 13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core 14 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer 17 The TWD is usually attached to a GIC to deliver its two per-processor 23 - arm,cortex-a9-twd-timer [all …]
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| D | arm,arch_timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marc Zyngier <marc.zyngier@arm.com> 11 - Mark Rutland <mark.rutland@arm.com> 13 ARM cores may have a per-core architected timer, which provides per-cpu timers, 15 physical and optional virtual timer per frame. 17 The per-core architected timer is attached to a GIC to deliver its 18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC 24 - items: [all …]
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| D | fsl,imxgpt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sascha Hauer <s.hauer@pengutronix.de> 15 - const: fsl,imx1-gpt 16 - const: fsl,imx21-gpt 17 - items: 18 - const: fsl,imx27-gpt 19 - const: fsl,imx21-gpt 20 - const: fsl,imx31-gpt [all …]
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| D | nxp,tpm-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dong Aisheng <aisheng.dong@nxp.com> 23 - const: fsl,imx7ulp-tpm 24 - items: 25 - const: fsl,imx8ulp-tpm 26 - const: fsl,imx7ulp-tpm 36 - description: SoC TPM ipg clock [all …]
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| /Documentation/arch/x86/ |
| D | topology.rst | 1 .. SPDX-License-Identifier: GPL-2.0 11 The architecture-agnostic topology definitions are in 12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific 17 Needless to say, code should use the generic functions - this file is *only* 35 - packages 36 - cores 37 - threads 48 Package-related topology information in the kernel: 50 - topology_num_threads_per_package() 54 - topology_num_cores_per_package() [all …]
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| /Documentation/translations/it_IT/ |
| D | index.rst | 1 .. SPDX-License-Identifier: GPL-2.0 23 I miglioramenti alla documentazione sono sempre i benvenuti; per cui, 24 se vuoi aiutare, iscriviti alla lista di discussione linux-doc presso 33 la comprensione per chi non capisce l'inglese o ha dubbi sulla sua 34 interpretazione, oppure semplicemente per chi preferisce leggere in lingua 39 :ref:`linux_doc` è altamente improbabile. I manutentori delle traduzioni - 40 e i contributori - seguono l'evolversi della documentazione ufficiale e 42 possibile. Per questo motivo non c'è garanzia che una traduzione sia 45 della traduzione e - se potete - verificate anche la documentazione in 54 di traduzione (per esempio, nuove traduzioni, aggiornamenti, correzioni). [all …]
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| /Documentation/usb/ |
| D | dwc3.rst | 11 - Convert interrupt handler to per-ep-thread-irq 13 As it turns out some DWC3-commands ~1ms to complete. Currently we spin 18 - dwc core implements a demultiplexing irq chip for interrupts per 20 to the device. If MSI provides per-endpoint interrupt this dummy 22 - interrupts are requested / allocated on usb_ep_enable() and removed on 25 - dwc3_send_gadget_ep_cmd() will sleep in wait_for_completion_timeout() 27 - the interrupt handler is split into the following pieces: 29 - primary handler of the device 34 - threaded handler of the device 37 - primary handler of the EP-interrupt [all …]
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| /Documentation/translations/it_IT/core-api/ |
| D | symbol-namespaces.rst | 1 .. include:: ../disclaimer-ita.rst 3 :Original: Documentation/core-api/symbol-namespaces.rst 10 per strutturare quello che viene esportato internamente al kernel 16 Lo spazio dei nomi dei simboli è stato introdotto come mezzo per strutturare 19 nomi. Questo meccanismo è utile per la documentazione (pensate ad 20 esempio allo spazio dei nomi SUBSYSTEM_DEBUG) così come per limitare 42 Tenete presente che per via dell'espansione delle macro questo argomento deve 43 essere un simbolo di preprocessore. Per esempio per esportare il 59 Definire lo spazio dei nomi per tutti i simboli di un sottosistema può essere 62 diventa lo spazio dei simboli di base per tutti gli usi di EXPORT_SYMBOL() [all …]
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| /Documentation/devicetree/bindings/iio/afe/ |
| D | temperature-transducer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/afe/temperature-transducer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liam Beguin <liambeguin@gmail.com> 19 When an io-channel measures the output voltage of a temperature analog front 35 ----- 37 +---+---+ 39 +---+---+ ----- 41 V proportional to T +----+----+ [all …]
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| /Documentation/devicetree/bindings/power/supply/ |
| D | richtek,rt5033-charger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jakob Hauser <jahau@rocketmail.com> 14 under sub-node named "charger" using the following format. 18 const: richtek,rt5033-charger 20 monitored-battery: 26 precharge-current-microamp: 27 Current of pre-charge mode. The pre-charge current levels are 350 mA [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | brcm,usb-pinmap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/brcm,usb-pinmap.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Al Cooper <alcooperx@gmail.com> 15 - const: brcm,usb-pinmap 22 description: Interrupt for signals mirrored to out-gpios. 24 in-gpios: 29 brcm,in-functions: 30 $ref: /schemas/types.yaml#/definitions/string-array [all …]
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,embedded-trace-extension.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Suzuki K Poulose <suzuki.poulose@arm.com> 12 - Mathieu Poirier <mathieu.poirier@linaro.org> 15 Arm Embedded Trace Extension(ETE) is a per CPU trace component that 19 components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer 21 legacy CoreSight components, a node must be listed per instance, along 22 with any optional connection graph as per the coresight bindings. [all …]
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | apple,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hector Martin <marcan@marcan.st> 19 - Level-triggered hardware IRQs wired to SoC blocks 20 - Single mask bit per IRQ 21 - Per-IRQ affinity setting 22 - Automatic masking on event delivery (auto-ack) 23 - Software triggering (ORed with hw line) [all …]
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| /Documentation/driver-api/media/drivers/ |
| D | zoran.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 website: http://mjpeg.sourceforge.net/driver-zoran/ 12 -------------------------- 15 ------------------------ 28 Drivers to use: videodev, i2c-core, i2c-algo-bit, 31 Inputs/outputs: Composite and S-video 45 Drivers to use: videodev, i2c-core, i2c-algo-bit, 49 Six physical inputs. 1-6 are composite, 50 1-2, 3-4, 5-6 doubles as S-video, 51 1-3 triples as component. [all …]
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,keystone-rproc.txt | 4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core 5 sub-systems that are used to offload some of the processor-intensive tasks or 8 These processor sub-systems usually contain additional sub-modules like L1 10 a dedicated local power/sleep controller etc. The DSP processor core in 15 Each DSP Core sub-system is represented as a single DT node, and should also 22 -------------------- 25 - compatible: Should be one of the following, 26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs 27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs 28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs [all …]
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| /Documentation/devicetree/bindings/pwm/ |
| D | imx-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Philipp Zabel <p.zabel@pengutronix.de> 13 - $ref: pwm.yaml# 16 "#pwm-cells": 19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags. 24 - enum: 25 - fsl,imx1-pwm [all …]
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| /Documentation/devicetree/bindings/display/ |
| D | atmel,lcdc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nicolas Ferre <nicolas.ferre@microchip.com> 11 - Dharma Balasubiramani <dharma.b@microchip.com> 16 input buffer per layer that fetches pixels through the single bus host 17 interface and a look-up table to allow palletized display configurations. The 18 LCDC is programmable on a per layer basis, and supports different LCD 26 - required: [ 'atmel,dmacon' ] [all …]
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| /Documentation/devicetree/bindings/input/ |
| D | rotary-encoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/input/rotary-encoder.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li <Frank.Li@nxp.com> 13 See Documentation/input/devices/rotary-encoder.rst for more information. 17 const: rotary-encoder 28 rotary-encoder,steps: 36 rotary-encoder,relative-axis: 40 absolute one. Relative axis will only generate +1/-1 events on the input [all …]
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| /Documentation/cpu-freq/ |
| D | cpu-drivers.rst | 1 .. SPDX-License-Identifier: GPL-2.0 10 - Dominik Brodowski <linux@brodo.de> 11 - Rafael J. Wysocki <rafael.j.wysocki@intel.com> 12 - Viresh Kumar <viresh.kumar@linaro.org> 18 1.2 Per-CPU Initialization 31 So, you just got a brand-new CPU / chipset with datasheets and want to 37 ------------------ 41 chipset. If so, register a struct cpufreq_driver with the CPUfreq core 46 .name - The name of this driver. 48 .init - A pointer to the per-policy initialization function. [all …]
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| /Documentation/devicetree/bindings/media/ |
| D | coda.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Chips&Media Coda multi-standard codec IP 10 - Philipp Zabel <p.zabel@pengutronix.de> 12 description: |- 19 - items: 20 - const: fsl,imx27-vpu 21 - const: cnm,codadx6 22 - items: [all …]
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| /Documentation/translations/it_IT/process/ |
| D | 4.Coding.rst | 1 .. include:: ../disclaimer-ita.rst 23 -------- 29 :ref:`Documentation/translations/it_IT/process/coding-style.rst <codingstyle>`. 30 Per la maggior parte del tempo, la politica descritta in quel file è stata 33 La presenza di quel codice conduce a due distinti pericoli per gli 42 per gli sviluppatori una comprensione veloce di ogni sua parte. Non ci sono, 43 quindi, più spazi per un codice formattato alla carlona. 49 in differenti modi - incluso il controllo sul come formattare il codice. 53 iniziare a generare patch che correggono lo stile come modo per prendere 54 famigliarità con il processo, o come modo per inserire i propri nomi nei [all …]
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