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/Documentation/devicetree/bindings/memory-controllers/ddr/
Djedec,lpddr3-timings.yaml36 CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds.
42 SELF REFRESH) in pico seconds.
47 Four-bank activate window in pico seconds.
52 Mode register set command delay in pico seconds.
57 Additional READ-to-READ delay in chip-to-chip cases in pico seconds.
62 Row active time in pico seconds.
67 ACTIVATE-to-ACTIVATE command period in pico seconds.
72 RAS-to-CAS delay in pico seconds.
77 Refresh Cycle time in pico seconds.
82 Row precharge time (all banks) in pico seconds.
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Djedec,lpddr2-timings.yaml30 SELF REFRESH) in pico seconds.
35 DQS output data access time from CK_t/CK_c in pico seconds.
40 DQS output data access time from CK_t/CK_c, temperature de-rated, in pico
46 Four-bank activate window in pico seconds.
55 Row active time in pico seconds.
60 RAS-to-CAS delay in pico seconds.
65 Row precharge time (all banks) in pico seconds.
70 Active bank A to active bank B in pico seconds.
75 Internal READ to PRECHARGE command delay in pico seconds.
80 WRITE recovery time in pico seconds.
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/Documentation/devicetree/bindings/net/
Dingenic,mac.yaml44 description: RGMII receive clock delay defined in pico seconds
47 description: RGMII transmit clock delay defined in pico seconds
Dadi,adin.yaml22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
Dti,dp83869.yaml68 description: Delay is in pico seconds
74 description: Delay is in pico seconds
Dmotorcomm,yt8xxx.yaml24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
33 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
Dethernet-controller.yaml278 RGMII Receive Clock Delay defined in pico seconds. This is used for
283 RGMII Transmit Clock Delay defined in pico seconds. This is used for
Dethernet-phy.yaml204 RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
210 RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for
/Documentation/devicetree/bindings/arm/
Dfsl.yaml293 - technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf
294 - technexion,imx6q-pico-hobbit # TechNexion i.MX6Q Pico-Hobbit
295 - technexion,imx6q-pico-nymph # TechNexion i.MX6Q Pico-Nymph
296 - technexion,imx6q-pico-pi # TechNexion i.MX6Q Pico-Pi
485 - technexion,imx6dl-pico-dwarf # TechNexion i.MX6DL Pico-Dwarf
486 - technexion,imx6dl-pico-hobbit # TechNexion i.MX6DL Pico-Hobbit
487 - technexion,imx6dl-pico-nymph # TechNexion i.MX6DL Pico-Nymph
488 - technexion,imx6dl-pico-pi # TechNexion i.MX6DL Pico-Pi
645 - technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf
646 - technexion,imx6ul-pico-hobbit # TechNexion i.MX6UL Pico-Hobbit
[all …]
Dmediatek.yaml220 - description: Google Pico (Acer Chromebook Spin 311)
223 - google,pico-sku1
224 - google,pico-sku2
225 - const: google,pico
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-st.txt141 - delay is retime delay in pico seconds as mentioned in data sheet.
151 as non inverted clock retimed with CLK_B and delay of 0 pico seconds:
/Documentation/fb/
Dep93xx-fb.rst24 Note that the pixel clock value is in pico-seconds. You can use the
Dapi.rst208 __u32 pixclock; /* pixel clock in ps (pico seconds) */
Dframebuffer.rst266 - pixclock: pixel clock in ps (pico seconds)
/Documentation/driver-api/
Ddpll.rst206 All phase related values are provided in pico seconds, which represents