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/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple MMC power sequence provider
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 The purpose of the simple MMC power sequence provider is to supports a set
14 of common properties between various SOC designs. It thus enables us to use
19 const: mmc-pwrseq-simple
21 reset-gpios:
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/Documentation/devicetree/bindings/regulator/
Dfixed-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/fixed-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
16 expected to have the regulator-min-microvolt and regulator-max-microvolt
20 - $ref: regulator.yaml#
21 - if:
25 const: regulator-fixed-clock
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Dti,tps65132.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI TPS65132 Dual Output Power Regulators
10 - devicetree@vger.kernel.org
21 - ti,tps65132
26 vin-supply: true
37 enable-gpios:
40 GPIO specifier to enable the GPIO control (on/off) for regulator.
42 active-discharge-gpios:
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Dregulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
14 regulator-name:
18 regulator-min-microvolt:
21 regulator-max-microvolt:
24 regulator-microvolt-offset:
28 regulator-min-microamp:
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/Documentation/devicetree/bindings/leds/
Dcommon.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
48 function-enumerator:
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/Documentation/devicetree/bindings/cpu/
Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
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/Documentation/devicetree/bindings/usb/
Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
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/Documentation/sound/
Dalsa-configuration.rst2 Advanced Linux Sound Architecture - Driver Configuration guide
38 ----------
47 limiting card index for auto-loading (1-8);
49 For auto-loading more than one card, specify this option
50 together with snd-card-X aliases.
63 Module snd-pcm-oss
64 ------------------
86 regarding opening the device. When this option is non-zero,
90 Module snd-rawmidi
91 ------------------
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/Documentation/networking/
Dethtool-netlink.rst27 wake-on-lan password) omitted.
34 can distinguish three states: "on", "off" and "not present" (meaning the
37 number 1 but any non-zero value should be understood as "true" by recipient.
44 Attributes that need to be filled-in by device drivers and that are dumped to
98 representing bit values and mask of affected bits) and bit-by-bit (list of
101 Verbose (bit-by-bit) bitsets allow sending symbolic names for bits together
126 rounded up to a multiple of 32 bits. They consist of 32-bit words in host byte
141 Bit-by-bit form: nested (bitset) attribute contents:
143 +------------------------------------+--------+-----------------------------+
145 +------------------------------------+--------+-----------------------------+
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/Documentation/admin-guide/sysctl/
Dnet.rst9 - Terrehon Bowden <terrehon@pacbell.net>
10 - Bodo Bauer <bb@ricochet.net>
14 - Jorge Nerin <comandante@zaralinux.com>
18 - Shen Feng <shen@cn.fujitsu.com>
22 ------------------------------------------------------------------------------
47 1. /proc/sys/net/core - Network core options
51 --------------
63 - x86_64
64 - x86_32
65 - arm64
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/Documentation/scheduler/
Dsched-util-clamp.rst1 .. SPDX-License-Identifier: GPL-2.0
57 foreground, top-app, etc. Util clamp can be used to constrain how much
60 the ones belonging to the currently active app (top-app group). Beside this
61 helps in limiting how much power they consume. This can be more obvious in
65 1. The big cores are free to run top-app tasks immediately. top-app
68 2. They don't run on a power hungry core and drain battery even if they
86 performance point will suffer a delay of ~200ms (PELT HALFIFE = 32ms) for the
106 Note that by design RT tasks don't have per-task PELT signal and must always
109 Note that using schedutil always implies a single delay to modify the frequency
114 See :ref:`section 3.4 <uclamp-default-values>` for default values and
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/Documentation/admin-guide/
Dext4.rst1 .. SPDX-License-Identifier: GPL-2.0
9 (64 bit) in keeping with increasing disk capacities and state-of-the-art
12 Mailing list: linux-ext4@vger.kernel.org
23 - The latest version of e2fsprogs can be found at:
35 - Create a new filesystem using the ext4 filesystem type:
37 # mke2fs -t ext4 /dev/hda1
41 # tune2fs -O extents /dev/hda1
46 # tune2fs -I 256 /dev/hda1
48 - Mounting:
50 # mount -t ext4 /dev/hda1 /wherever
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/Documentation/networking/device_drivers/can/ctu/
Dctucanfd-driver.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
10 ------------------------
19 `Vivado integration <https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top>`_
20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board
21 `QSys integration <https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd>`_
23 `PCIe integration <https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd>`_ of the core.
33 version of emulation support can be cloned from ctu-canfd branch of QEMU local
34 development `repository <https://gitlab.fel.cvut.cz/canbus/qemu-canbus>`_.
38 ---------------
59 it allows for device hot-plug.
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/Documentation/admin-guide/pm/
Dintel_pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
66 -----------
69 hardware-managed P-states (HWP) support. If it works in this mode, the
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Damd-pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
5 ``amd-pstate`` CPU Performance Scaling Driver
16 ``amd-pstate`` is the AMD CPU performance scaling driver that introduces a
20 than legacy ACPI hardware P-States. Current AMD CPU/APU platforms are using
21 the ACPI P-states driver to manage CPU frequency and clocks with switching
22 only in 3 P-states. CPPC replaces the ACPI P-states controls and allows a
23 flexible, low-latency interface for the Linux kernel to directly
26 ``amd-pstate`` leverages the Linux kernel governors such as ``schedutil``,
30 Volume 2: System Programming [1]_). Currently, ``amd-pstate`` supports basic
40 continuous, abstract, and unit-less performance value in a scale that is
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/Documentation/virt/kvm/x86/
Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
63 -------------- | +->| GATE TIMER 0 |
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/Documentation/scsi/
DChangeLog.ncr53c8xx1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr)
2 * version ncr53c8xx-3.4.3b
3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM.
4 Fix sent by Stig Telfer <stig@api-networks.com>.
5 - Define scsi_set_pci_device() as nil for kernel < 2.4.4.
7 Mon Feb 12 22:30 2001 Gerard Roudier (groudier@club-internet.fr)
8 * version ncr53c8xx-3.4.3
9 - Call pci_enable_device() as AC wants this to be done.
10 - Get both the BAR cookies actual and PCI BAR values.
12 - Merge changes for linux-2.4 that declare the host template
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/Documentation/arch/x86/
Dresctrl.rst1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
10 - Tony Luck <tony.luck@intel.com>
11 - Vikas Shivappa <vikas.shivappa@intel.com>
38 # mount -t resctrl resctrl [-o cdp[,cdpl2][,mba_MBps][,debug]] /sys/fs/resctrl
57 pseudo-locking is a unique way of using cache control to "pin" or
59 "Cache Pseudo-Locking".
96 own settings for cache use which can over-ride
128 Corresponding region is pseudo-locked. No
131 Indicates if non-contiguous 1s value in CBM is supported.
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/Documentation/trace/
Dhistogram.rst33 numeric fields - on an event hit, the value(s) will be added to a
35 in place of an explicit value field - this is simply a count of
45 useful for providing more fine-grained summaries of event data.
69 numeric fields are displayed as base-10 integers. This can be
76 .sym-offset display an address as a symbol and offset
83 .graph display a bar-graph of a value
91 - only the 'hex' modifier can be used for values (because values
94 - the 'execname' modifier can only be used on a 'common_pid'. The
100 pid-specific comm fields in the event itself.
103 trigger, read its current contents, and then turn it off::
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/Documentation/admin-guide/RAS/
Dmain.rst1 .. SPDX-License-Identifier: GPL-2.0
37 -------------
51 Self-Monitoring, Analysis and Reporting Technology (SMART).
59 ---------------
72 * **Correctable Error (CE)** - the error detection mechanism detected and
76 * **Uncorrected Error (UE)** - the amount of errors happened above the error
77 correction threshold, and the system was unable to auto-correct.
79 * **Fatal Error** - when an UE error happens on a critical component of the
83 * **Non-fatal Error** - when an UE error happens on an unused component,
84 like a CPU in power down state or an unused memory bank, the system may
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/Documentation/RCU/Design/Requirements/
DRequirements.rst16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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