Searched +full:queue +full:- +full:rx (Results 1 – 25 of 77) sorted by relevance
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| /Documentation/devicetree/bindings/net/ |
| D | intel,ixp4xx-ethernet.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: ethernet-controller.yaml#
14 - Linus Walleij <linus.walleij@linaro.org>
18 Processing Engine) and the IXP4xx Queue Manager to process
24 const: intel,ixp4xx-ethernet
30 queue-rx:
31 $ref: /schemas/types.yaml#/definitions/phandle-array
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| D | intel,ixp4xx-hss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
15 Processing Engine) and the IXP4xx Queue Manager to process
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
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| D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
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| D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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| /Documentation/netlink/specs/ |
| D | netdev.yaml | 1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
9 -
11 name: xdp-act
12 render-max: true
14 -
19 -
23 -
24 name: ndo-xmit
27 -
28 name: xsk-zerocopy
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| /Documentation/devicetree/bindings/crypto/ |
| D | intel,ixp4xx-crypto.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
21 const: intel,ixp4xx-crypto
23 intel,npe-handle:
24 $ref: /schemas/types.yaml#/definitions/phandle-array
26 - items:
27 - description: phandle to the NPE this crypto engine
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| /Documentation/virt/gunyah/ |
| D | message-queue.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Message queue is a simple low-capacity IPC channel between two virtual machines.
7 message queue is unidirectional and buffered in the hypervisor. A full-duplex
10 The size of the queue and the maximum size of the message that can be passed is
11 fixed at creation of the message queue. Resource manager is presently the only
14 further protocol on top of the message queue messages themselves. For instance,
18 The diagram below shows how message queue works. A typical configuration
19 involves 2 message queues. Message queue 1 allows VM_A to send messages to VM_B.
20 Message queue 2 allows VM_B to send messages to VM_A.
24 message queue 1's queue. The hypervisor copies memory into the internal
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| /Documentation/networking/device_drivers/ethernet/amazon/ |
| D | ena.rst | 1 .. SPDX-License-Identifier: GPL-2.0
15 through an Admin Queue.
17 The driver supports a range of ENA devices, is link-speed independent
21 Some ENA devices support SR-IOV. This driver is used for both the
22 SR-IOV Physical Function (PF) and Virtual Function (VF) devices.
25 processing by providing multiple Tx/Rx queue pairs (the maximum number
26 is advertised by the device via the Admin Queue), a dedicated MSI-X
27 interrupt vector per Tx/Rx queue pair, adaptive interrupt moderation,
31 checksum offload. Receive-side scaling (RSS) is supported for multi-core
39 Some of the ENA devices support a working mode called Low-latency
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| /Documentation/networking/device_drivers/ethernet/aquantia/ |
| D | atlantic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 For the aQuantia Multi-Gigabit PCI Express Family of Ethernet Adapters
12 - Identifying Your Adapter
13 - Configuration
14 - Supported ethtool options
15 - Command Line Parameters
16 - Config file parameters
17 - Support
18 - License
23 The driver in this release is compatible with AQC-100, AQC-107, AQC-108
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| /Documentation/devicetree/bindings/firmware/ |
| D | gunyah-hypervisor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/gunyah-hypervisor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Prakruthi Deepak Heragu <quic_pheragu@quicinc.com>
11 - Elliot Berman <quic_eberman@quicinc.com>
16 …See also: https://github.com/quic/gunyah-resource-manager/blob/develop/src/vm_creation/dto_constru…
20 const: gunyah-hypervisor
22 "#address-cells":
23 description: Number of cells needed to represent 64-bit capability IDs.
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| D | intel,ixp4xx-network-processing-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
24 - items:
25 - const: intel,ixp4xx-network-processing-engine
29 - description: NPE0 (NPE-A) register range
30 - description: NPE1 (NPE-B) register range
31 - description: NPE2 (NPE-C) register range
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| /Documentation/networking/ |
| D | af_xdp.rst | 1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
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| D | devmem.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 -----------
22 - Distributed training, where ML accelerators, such as GPUs on different hosts,
25 - Distributed raw block storage applications transfer large amounts of data with
28 Typically the Device-to-Device data transfers in the network are implemented as
29 the following low-level operations: Device-to-Host copy, Host-to-Host network
30 transfer, and Host-to-Device copy.
46 - Alleviate host memory bandwidth pressure, compared to existing
47 network-transfer + device-copy semantics.
49 - Alleviate PCIe bandwidth pressure, by limiting data transfer to the lowest
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| D | scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
32 queue, which in turn can be processed by separate CPUs. This mechanism is
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
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| D | napi.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
23 of event (packet Rx and Tx) processing.
30 of the NAPI instance while the method is the driver-specific event
37 -----------
55 ------------
64 argument - drivers can process completions for any number of Tx
66 Rx packets. Rx processing is usually much more expensive.
68 In other words for Rx processing the ``budget`` argument limits how many
69 packets driver can process in a single poll. Rx specific APIs like page
77 skb Tx completions and no Rx or XDP packets.
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| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,message-manager.txt | 7 "proxies" - each instance is unidirectional and is instantiated at SoC
13 --------------------
14 - compatible: Shall be: "ti,k2g-message-manager"
15 - reg-names queue_proxy_region - Map the queue proxy region.
16 queue_state_debug_region - Map the queue state debug
18 - reg: Contains the register map per reg-names.
19 - #mbox-cells Shall be 2. Contains the queue ID and proxy ID in that
21 - interrupt-names: Contains interrupt names matching the rx transfer path
24 For ti,k2g-message-manager, this shall contain:
26 - interrupts: Contains the interrupt information corresponding to
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| /Documentation/networking/device_drivers/ethernet/google/ |
| D | gve.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
12 +--------------+----------+---------+
16 +--------------+----------+---------+
18 +--------------+----------+---------+
19 |Sub-vendor ID | `0x1AE0` | Google |
20 +--------------+----------+---------+
21 |Sub-device ID | `0x0058` | |
22 +--------------+----------+---------+
24 +--------------+----------+---------+
26 +--------------+----------+---------+
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | idpf.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
33 -------
42 ---------------------
47 # dmesg -n 8
54 ------------
87 -----------------------
95 # ethtool -C <ethX> adaptive-rx off adaptive-tx off
98 - Disable adaptive ITR and lower Rx and Tx interrupts. The examples below
99 affect every queue of the specified interface.
101 - Setting rx-usecs and tx-usecs to 80 will limit interrupts to about
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| D | i40e.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
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| /Documentation/networking/device_drivers/ethernet/huawei/ |
| D | hinic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
14 Some HiNIC devices support SR-IOV. This driver is used for Physical Function
17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
28 19e5:1822 - HiNIC PF
34 hinic_dev - Implement a Logical Network device that is independent from
37 hinic_hwdev - Implement the HW details of the device and include the components
55 Asynchronous Event Queues(AEQs) - The event queues for receiving messages from
58 Application Programmable Interface commands(API CMD) - Interface for sending
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| /Documentation/ABI/testing/ |
| D | sysfs-class-net-queues | 1 What: /sys/class/net/<iface>/queues/rx-<queue>/rps_cpus
8 network device queue. Possible values depend on the number
11 What: /sys/class/net/<iface>/queues/rx-<queue>/rps_flow_cnt
17 processed by this particular network device receive queue.
19 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
25 network interface transmit queue.
27 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
32 A Mbps max-rate set for the queue, a value of zero means disabled,
35 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
42 network device transmit queue. Possible values depend on the
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| /Documentation/networking/device_drivers/ethernet/freescale/ |
| D | dpaa.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | keystone-navigator-dma.txt | 5 channels and flows for the QMSS(Queue Manager SubSystem) who triggers
13 ------------------
15 ------------------
17 |-> DMA instance #0
19 |-> DMA instance #1
23 |-> DMA instance #n
27 - compatible: Should be "ti,keystone-navigator-dma"
28 - clocks: phandle to dma instances clocks. The clock handles can be as
31 - ti,navigator-cloud-address: Should contain base address for the multi-core
34 into DMA and the DMA uses it as the physical addresses to reach queue
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| /Documentation/networking/device_drivers/ethernet/toshiba/ |
| D | spider_net.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 The Structure of the RX Ring.
20 The receive (RX) ring is a circular linked list of RX descriptors,
29 "full" and "not-in-use". An "empty" or "ready" descriptor is ready
31 and is waiting to be emptied and processed by the OS. A "not-in-use"
36 spidernet device driver) allocates a set of RX descriptors and RX
40 buffers, processing them, and re-marking them empty.
47 flowing RX traffic, every descr behind it should be marked "full",
54 descr. The OS will process this descr, and then mark it "not-in-use",
55 and advance the tail pointer. Thus, when there is flowing RX traffic,
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| /Documentation/networking/devlink/ |
| D | mlx5.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 .. list-table:: Generic parameters implemented
15 * - Name
16 - Mode
17 - Validation
18 * - ``enable_roce``
19 - driverinit
20 - Type: Boolean
26 * - ``io_eq_size``
27 - driverinit
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