Searched +full:regulator +full:- +full:allow +full:- +full:set +full:- +full:load (Results 1 – 6 of 6) sorted by relevance
| /Documentation/devicetree/bindings/regulator/ |
| D | regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/regulator/regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liam Girdwood <lgirdwood@gmail.com> 11 - Mark Brown <broonie@kernel.org> 14 regulator-name: 15 description: A string used as a descriptive name for regulator outputs 18 regulator-min-microvolt: 19 description: smallest voltage consumers may set [all …]
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| D | qcom,rpmh-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/qcom,rpmh-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 14 rpmh-regulator devices support PMIC regulator management via the Voltage 15 Regulator Manager (VRM) and Oscillator Buffer (XOB) RPMh accelerators. 18 changing three parameters for a given regulator, enable state, output 20 parameter for a given regulator, its enable state. Despite its name, [all …]
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | wkup-m3-ipc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dave Gerlach <d-gerlach@ti.com> 11 - Drew Fustini <dfustini@baylibre.com> 14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor 17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver 20 API to allow the SoC PM code to execute specific PM tasks. 29 On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is [all …]
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| /Documentation/admin-guide/ |
| D | kernel-parameters.txt | 16 force -- enable ACPI if default was off 17 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 18 off -- disable ACPI if default was on 19 noirq -- do not use ACPI for IRQ routing 20 strict -- Be less tolerant of platforms that are not 22 rsdt -- prefer RSDT over (default) XSDT 23 copy_dsdt -- copy DSDT to memory 24 nospcr -- disable console in ACPI SPCR table as 41 If set to vendor, prefer vendor-specific driver 44 If set to video, use the ACPI video.ko driver. [all …]
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| /Documentation/arch/arm64/ |
| D | arm-acpi.rst | 9 Arm Servers, in addition to being BSA compliant, comply with a set 22 While the documents mentioned above set out the requirements for building 23 industry-standard Arm systems, they also apply to more than one operating 25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of 30 ---------------- 33 exist in Linux for describing non-enumerable hardware, after all. In this 40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior, 45 - ACPI’s OSPM defines a power management model that constrains what the 49 - In the enterprise server environment, ACPI has established bindings (such 55 - Choosing a single interface to describe the abstraction between a platform [all …]
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| /Documentation/driver-api/ |
| D | pin-control.rst | 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain, 15 load capacitance etc. 17 Top-level interface 22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that 23 can control PINs. It may be able to multiplex, bias, set load capacitance, 24 set drive strength, etc. for individual pins or groups of pins. 26 - PINS are equal to pads, fingers, balls or whatever packaging input or [all …]
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