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/Documentation/devicetree/bindings/serial/
Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
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/Documentation/devicetree/bindings/sound/
Dst,stm32-spdifrx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 IEC-60958 and IEC-61937.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-spdifrx
24 "#sound-dai-cells":
33 clock-names:
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/Documentation/devicetree/bindings/media/
Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
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/Documentation/devicetree/bindings/dma/
Dintel,ldma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
21 - intel,lgm-dma1rx
22 - intel,lgm-dma1tx
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/Documentation/devicetree/bindings/net/
Dnixge.txt4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
11 "ctrl": MDIO and PHY control and status region
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
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/Documentation/networking/
Dstatistics.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - standard interface statistics based on
16 - protocol-specific statistics; and
17 - driver-defined statistics available via ethtool.
20 -----------------------------
25 $ ip -s -s link show dev ens4u1u1
28 RX: bytes packets errors dropped overrun mcast
30 RX errors: length crc frame fifo missed
38 Note that `-s` has been specified twice to see all members of
40 If `-s` is specified once the detailed errors won't be shown.
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Dethtool-netlink.rst27 wake-on-lan password) omitted.
37 number 1 but any non-zero value should be understood as "true" by recipient.
44 Attributes that need to be filled-in by device drivers and that are dumped to
98 representing bit values and mask of affected bits) and bit-by-bit (list of
101 Verbose (bit-by-bit) bitsets allow sending symbolic names for bits together
126 rounded up to a multiple of 32 bits. They consist of 32-bit words in host byte
141 Bit-by-bit form: nested (bitset) attribute contents:
143 +------------------------------------+--------+-----------------------------+
145 +------------------------------------+--------+-----------------------------+
147 +------------------------------------+--------+-----------------------------+
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/Documentation/devicetree/bindings/usb/
Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
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Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
25 reg-names: phy
31 - compatible: ti,musb-am33xx
32 - reg: offset and length of "USB Controller Registers", and offset and
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/Documentation/devicetree/bindings/spi/
Darm,pl022-peripheral-props.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/arm,pl022-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for Arm PL022 SPI controller
10 - Linus Walleij <linus.walleij@linaro.org>
19 - 0 # SPI
20 - 1 # Texas Instruments Synchronous Serial Frame Format
21 - 2 # Microwire (Half Duplex)
23 pl022,com-mode:
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Dspi-pl022.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: spi-controller.yaml#
14 - $ref: /schemas/arm/primecell.yaml#
23 - compatible
28 - const: arm,pl022
29 - const: arm,primecell
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/Documentation/devicetree/bindings/dsp/
Dfsl,dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
11 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 advanced pre- and post- audio processing.
20 - fsl,imx8qxp-dsp
21 - fsl,imx8qm-dsp
22 - fsl,imx8mp-dsp
23 - fsl,imx8ulp-dsp
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/Documentation/devicetree/bindings/phy/
Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
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Dbrcm,sata-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,sata-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
14 pattern: "^sata[-|_]phy(@.*)?$"
18 - items:
19 - enum:
20 - brcm,bcm7216-sata-phy
21 - brcm,bcm7425-sata-phy
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Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
45 "#size-cells":
48 vdda1v1-supply:
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/Documentation/devicetree/bindings/mailbox/
Dxlnx,zynqmp-ipi-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +-------------------------------------+
16 +-------------------------------------+
17 +--------------------------------------------------+
18 TF-A | |
21 +--------------------------+ |
24 +--------------------------------------------------+
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/Documentation/netlink/specs/
Dethtool.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
10 -
11 name: udp-tunnel-type
12 enum-name:
14 entries: [ vxlan, geneve, vxlan-gpe ]
15 -
19 -
20 name: header-flags
22 entries: [ compact-bitsets, omit-reply, stats ]
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/Documentation/userspace-api/media/cec/
Dcec-ioc-receive.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
14 CEC_RECEIVE, CEC_TRANSMIT - Receive or transmit a CEC message
42 If the file descriptor is in non-blocking mode and there are no received
43 messages pending, then it will return -1 and set errno to the ``EAGAIN``
45 is non-zero and no message arrived within ``timeout`` milliseconds, then
46 it will return -1 and set errno to the ``ETIMEDOUT`` error code.
51 be 0, ``tx_status`` will be 0 and ``rx_status`` will be non-zero).
52 2. the transmit result of an earlier non-blocking transmit (the ``sequence``
53 field will be non-zero, ``tx_status`` will be non-zero and ``rx_status``
55 3. the reply to an earlier non-blocking transmit (the ``sequence`` field will
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/Documentation/devicetree/bindings/display/
Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
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/Documentation/networking/device_drivers/ethernet/intel/
Dice.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
43 -------------------------------------------
54 1) Make sure that your system's physical memory is in a high-performance
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/Documentation/driver-api/usb/
Ddwc3.rst15 1. Peripheral-only configuration
16 2. Host-only configuration
17 3. Dual-Role configuration
46 pipe - ep0)
49 4. Scatter-list support
58 These features have all been exercised with many of the **in-tree**
67 for new-comers to read the code and understand how it behaves.
83 ---------------------------------
88 receive a Mass Storage *CBW* [#cbw]_, req->length must either be set
91 to a throw-away buffer for the remaining length. Without this, OUT
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/Documentation/userspace-api/media/v4l/
Dvidioc-g-ext-ctrls.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_EXT_CTRLS - VIDIOC_S_EXT_CTRLS - VIDIOC_TRY_EXT_CTRLS - Get or set the value of several co…
44 :ref:`ctrl-class`) and all controls in the control array must belong
61 relevant for pointer-type controls like strings), then the driver will
63 should re-allocate the memory to this new size and try again. For the
70 N-dimensional arrays are set and retrieved row-by-row. You cannot set a
97 If ``request_fd`` is set to a not-yet-queued :ref:`request <media-request-api>`
118 were set/get. Only low-level errors (e. g. a failed i2c command) can
131 .. flat-table:: struct v4l2_ext_control
132 :header-rows: 0
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Dhist-v4l2.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _hist-v4l2:
21 1998-08-20: First version.
23 1998-08-27: The :c:func:`select()` function was introduced.
25 1998-09-10: New video standard interface.
27 1998-09-18: The ``VIDIOC_NONCAP`` ioctl was replaced by the otherwise
36 1998-09-28: Revamped video standard. Made video controls individually
39 1998-10-02: The ``id`` field was removed from
47 1998-11-08: Many minor changes. Most symbols have been renamed. Some
50 1998-11-12: The read/write direction of some ioctls was misdefined.
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/Documentation/input/devices/
Datarikbd.rst12 provides a convenient connection point for a mouse and switch-type joysticks.
13 The ikbd processor also maintains a time-of-day clock with one second
18 The ikbd communicates with the main processor over a high speed bi-directional
41 0xF8-0xFB relative mouse position records (lsbs determined by
43 0xFC time-of-day
67 ---------------------------
92 +127...-128 range, the motion is broken into multiple packets.
97 ---------------------------
104 ---------------------
120 ------------------------
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