Searched +full:sci +full:- +full:pm +full:- +full:domain (Results 1 – 12 of 12) sorted by relevance
| /Documentation/devicetree/bindings/soc/ti/ |
| D | sci-pm-domain.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI-SCI generic power domain 10 - Nishanth Menon <nm@ti.com> 13 - $ref: /schemas/power/power-domain.yaml# 20 through a protocol called TI System Control Interface (TI-SCI protocol). 22 This PM domain node represents the global PM domain managed by the TI-SCI 23 controller. Since this relies on the TI SCI protocol to communicate with [all …]
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| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 TI Programmable Real-Time Unit and Industrial Communication Subsystem 11 - Suman Anna <s-anna@ti.com> 15 The Programmable Real-Time Unit and Industrial Communication Subsystem 16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC 18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and 23 peripheral interfaces, fast real-time responses, or specialized data handling. [all …]
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| /Documentation/devicetree/bindings/arm/keystone/ |
| D | ti,sci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI-SCI controller 10 - Nishanth Menon <nm@ti.com> 23 See https://software-dl.ti.com/tisci/esd/latest/index.html for protocol definition. 25 The TI-SCI node describes the Texas Instrument's System Controller entity node. 27 specific functionality such as clocks, power domain, reset or additional 29 relationship between the TI-SCI parent node to the child node. [all …]
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-davinci.txt | 7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c"; 8 - reg : Offset and length of the register set for the device 9 - clocks: I2C functional clock phandle. 11 Documentation/devicetree/bindings/clock/ti,sci-clk.yaml 13 SoC-specific Required Properties: 17 - power-domains: Should contain a phandle to a PM domain provider node 20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml 23 - interrupts : standard interrupt property. 24 - clock-frequency : desired I2C bus clock frequency in Hz. 25 - ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | ti,keystone-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Roger Quadros <rogerq@kernel.org> 15 - enum: 16 - ti,keystone-dwc3 17 - ti,am654-dwc3 22 '#address-cells': 25 '#size-cells': [all …]
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| D | ti,am62-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller 10 - Aswath Govindraju <a-govindraju@ti.com> 14 const: ti,am62-usb 19 - description: USB CFG register space 20 - description: USB PHY2 register space 24 power-domains: [all …]
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| D | ti,j721e-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI wrapper module for the Cadence USBSS-DRD controller 10 - Roger Quadros <rogerq@kernel.org> 15 - const: ti,j721e-usb 16 - items: 17 - const: ti,am64-usb 18 - const: ti,j721e-usb [all …]
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| /Documentation/devicetree/bindings/mmc/ |
| D | ti-omap-hsmmc.txt | 10 -------------------- 11 - compatible: 12 Should be "ti,omap2-hsmmc", for OMAP2 controllers 13 Should be "ti,omap3-hsmmc", for OMAP3 controllers 14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 15 Should be "ti,omap4-hsmmc", for OMAP4 controllers 16 Should be "ti,am33xx-hsmmc", for AM335x controllers 17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers. 20 --------------------------------- 22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1. [all …]
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,keystone-rproc.txt | 5 sub-systems that are used to offload some of the processor-intensive tasks or 8 These processor sub-systems usually contain additional sub-modules like L1 15 Each DSP Core sub-system is represented as a single DT node, and should also 22 -------------------- 25 - compatible: Should be one of the following, 26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs 27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs 28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs 29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs 31 - reg: Should contain an entry for each value in 'reg-names'. [all …]
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| D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F 20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode 21 called "Single-CPU" mode, where only Core0 is used, but with ability to use 27 Each Dual-Core R5F sub-system is represented as a single DTS node 40 - ti,am62-r5fss [all …]
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| /Documentation/devicetree/bindings/dma/ |
| D | ti-edma.txt | 8 ------------------------------------------------------------------------------ 12 -------------------- 13 - compatible: Should be: 14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP, 16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the 18 - #dma-cells: Should be set to <2>. The first number is the DMA request 20 - reg: Memory map of eDMA CC 21 - reg-names: "edma3_cc" 22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT. 23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint" [all …]
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf 5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf 6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf 9 - #address-cells: number of cells required to define a chip select 11 - #size-cells: should be zero. 12 - compatible: 13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family 14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family 15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC 17 - reg: Offset and length of SPI controller register space [all …]
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