Searched +full:scl +full:- +full:output +full:- +full:only (Results 1 – 9 of 9) sorted by relevance
| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wolfram Sang <wsa@kernel.org> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 18 - const: i2c-gpio 20 sda-gpios: 24 from <dt-bindings/gpio/gpio.h> since the signal is by definition 28 scl-gpios: [all …]
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| D | samsung,s3c2410-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - enum: 16 - samsung,s3c2410-i2c 17 - samsung,s3c2440-i2c 18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: 19 - samsung,s3c2440-hdmiphy-i2c [all …]
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of various 26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt 29 [3] include/dt-bindings/pinctrl/lochnagar.h 37 - cirrus,lochnagar-pinctrl 39 gpio-controller: true 41 '#gpio-cells': [all …]
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| D | renesas,rza1-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 16 Pin multiplexing and GPIO configuration is performed on a per-pin basis 17 writing configuration values to per-port register sets. 25 - const: renesas,r7s72100-ports # RZ/A1H 26 - items: [all …]
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| D | renesas,rzv2m-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzv2m-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 15 Pin multiplexing and GPIO configuration is performed on a per-pin basis. 22 const: renesas,r9a09g011-pinctrl # RZ/V2M 27 gpio-controller: true 29 '#gpio-cells': [all …]
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| D | mediatek,mt6795-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 11 - Sean Wang <sean.wang@kernel.org> 18 const: mediatek,mt6795-pinctrl 20 gpio-controller: true 22 '#gpio-cells': 29 gpio-ranges: [all …]
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| /Documentation/hwmon/ |
| D | max31827.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 Addresses scanned: I2C 0x40 - 0x5f 20 Addresses scanned: I2C 0x40 - 0x5f 28 Addresses scanned: I2C 0x40 - 0x5f 34 - Daniel Matyas <daniel.matyas@analog.com> 37 ----------- 39 The chips supported by this driver are quite similar. The only difference 40 between them is found in the default power-on behaviour of the chips. While the 52 hysteresis value: -40 and -30 degrees for under temperature alarm and +100 and 66 exceeding TH and reset, it is set to 1 again only when the temperature drops [all …]
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| /Documentation/driver-api/gpio/ |
| D | driver.rst | 17 lines must conform to the definition: General Purpose Input/Output. If the 26 between 0 and n-1, n being the number of GPIOs managed by the chip. 29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO 30 lines are handled by one bit per line in a 32-bit register, it makes sense to 44 So for example one platform could use global numbers 32-159 for GPIOs, with a 46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type 47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy 49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders. 60 - methods to establish GPIO line direction 61 - methods used to access GPIO line values [all …]
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| /Documentation/driver-api/ |
| D | pin-control.rst | 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain, 17 Top-level interface 22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that 26 - PINS are equal to pads, fingers, balls or whatever packaging input or 27 output line you want to control and these are denoted by unsigned integers 30 be sparse - i.e. there may be gaps in the space with numbers where no 60 .. code-block:: c [all …]
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