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/Documentation/devicetree/bindings/crypto/
Dfsl,sec-v4.0.yaml1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Freescale SEC 4
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
16 NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator
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Dfsl,sec-v4.0-mon.yaml1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Freescale Secure Non-Volatile Storage (SNVS)
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
23 - items:
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Dfsl-sec6.txt1 SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
2 Currently Freescale powerpc chip C29X is embedded with SEC 6.
3 SEC 6 device tree binding include:
4 -SEC 6 Node
5 -Job Ring Node
6 -Full Example
9 SEC 6 Node
13 Node defines the base address of the SEC 6 block.
15 configuration registers for the SEC 6 block.
16 For example, In C293, we could see three SEC 6 node.
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/Documentation/devicetree/bindings/nvmem/
Dsnvs-lpgpr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage
10 - Oleksij Rempel <o.rempel@pengutronix.de>
15 - items:
16 - enum:
17 - fsl,imx8mm-snvs-lpgpr
18 - fsl,imx8mn-snvs-lpgpr
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/Documentation/staging/
Dstatic-keys.rst30 performance-sensitive fast-path kernel code, via a GCC feature and a code
72 gcc (v4.5) adds a new 'asm goto' statement that allows branching to a label:
74 https://gcc.gnu.org/ml/gcc-patches/2009-07/msg01556.html
77 by default, without the need to check memory. Then, at run-time, we can patch
86 consist of a single atomic 'no-op' instruction (5 bytes on x86), in the
87 straight-line code path. When the branch is 'flipped', we will patch the
88 'no-op' in the straight-line codepath with a 'jump' instruction to the
89 out-of-line true branch. Thus, changing branch direction is expensive but
110 allocated at run-time.
186 struct jump_entry table must be at least 4-byte aligned because the
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/Documentation/networking/
Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
64 single-consumer / single-producer (for performance reasons), the new
72 user-space application can place an XSK at an arbitrary place in this
99 http://vger.kernel.org/lpc_net2018_talks/lpc18_paper_af_xdp_perf-v2.pdf. Do
100 NOT consult the paper from 2017 on "AF_PACKET v4", the first attempt
106 ----
109 equal-sized frames. An UMEM is associated to a netdev and a specific
121 The UMEM has two single-producer/single-consumer rings that are used
123 user-space application.
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