Searched +full:stm32h7 +full:- +full:uart (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/serial/ |
| D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@foss.st.com> 15 - st,stm32-uart 16 - st,stm32f7-uart 17 - st,stm32h7-uart 32 description: label associated with this uart 34 st,hw-flow-ctrl: [all …]
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| /Documentation/devicetree/bindings/bus/ |
| D | st,stm32-etzpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 devices with programmable-security attributes (securable resources). 14 - Gatien Chevallier <gatien.chevallier@foss.st.com> 20 const: st,stm32-etzpc 22 - compatible 27 - const: st,stm32-etzpc 28 - const: simple-bus [all …]
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| D | st,stm32mp25-rifsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Gatien Chevallier <gatien.chevallier@foss.st.com> 19 - RISC registers associated with RISUP logic (resource isolation device unit 20 for peripherals), assign all non-RIF aware peripherals to zero, one or 22 - RIMC registers: associated with RIMU logic (resource isolation master 23 unit), assign all non RIF-aware bus master to one security domain by 28 - RISC registers associated with RISAL logic (resource isolation device unit [all …]
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