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/Documentation/devicetree/bindings/sound/
Dtest-component.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/test-component.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Test Component
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 - test-cpu
16 - test-cpu-verbose
17 - test-cpu-verbose-dai
18 - test-cpu-verbose-component
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/Documentation/ABI/testing/
Dsysfs-platform-intel-ifs1 Device instance to test mapping
2 intel_ifs_0 -> Scan Test
3 intel_ifs_1 -> Array BIST test
9 Description: Write <cpu#> to trigger IFS test for one online core.
10 Note that the test is per core. The cpu# can be
12 completes the test for the core containing that thread.
13 Example: to test the core containing cpu5: echo 5 >
21 Description: The status of the last test. It can be one of "pass", "fail"
29 Description: Additional information regarding the last test. The details file reports
30 the hex value of the STATUS MSR for this test. Note that the error_code field
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/Documentation/locking/
Dlocktorture.rst2 Kernel Lock Torture Test Operation
13 grepping for "torture"). The test is started when the module is loaded,
17 This torture test consists of creating a number of kernel threads which
30 Locktorture-specific
31 --------------------
49 - "lock_busted":
52 - "spin_lock":
55 - "spin_lock_irq":
58 - "rw_lock":
61 - "rw_lock_irq":
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Dpreempt-locking.rst2 Proper Locking Under a Preemptible Kernel: Keeping Kernel Code Preempt-Safe
21 RULE #1: Per-CPU data structures need explicit protection
32 First, since the data is per-CPU, it may not have explicit SMP locking, but
40 RULE #2: CPU state must be protected.
44 Under preemption, the state of the CPU must be protected. This is arch-
45 dependent, but includes CPU structures and state not preserved over a context
48 if the kernel is executing a floating-point instruction and is then preempted.
84 n-times in a code path, and preemption will not be reenabled until the n-th
93 disabling preemption - any cond_resched() or cond_resched_lock() might trigger
95 reschedule. So use this implicit preemption-disabling property only if you
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/Documentation/devicetree/bindings/arm/
Darm,realview.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
14 Cortex-A8, and Cortex-A9 CPUs. This included new features compared to the
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
23 as a generic platform to test different FPGA designs, and has
24 pluggable CPU modules, see ARM DUI 0303E.
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
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Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
11 - Linus Walleij <linus.walleij@linaro.org>
15 multicore Cortex-A class systems. The Versatile Express family contains both
33 The root node indicates the CPU SoC on the core tile, and this
37 further subvariants are released of the core tile, even more fine-granular
45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
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/Documentation/RCU/
Dtorture.rst1 .. SPDX-License-Identifier: GPL-2.0
4 RCU Torture Test Operation
13 be loaded to run a torture test. The test periodically outputs
15 command (perhaps grepping for "torture"). The test is started
19 Documentation/admin-guide/kernel-parameters.txt.
26 …rcu-torture:--- Start of test: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_…
27 …rcu-torture: rtc: (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0…
28 rcu-torture: Reader Pipe: 727860534 34213 0 0 0 0 0 0 0 0 0
29 rcu-torture: Reader Batch: 727877838 17003 0 0 0 0 0 0 0 0 0
30 …rcu-torture: Free-Block Circulation: 155440 155440 155440 155440 155440 155440 155440 155440 1554…
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/Documentation/fault-injection/
Dnotifier-error-inject.rst5 specified notifier chain callbacks. It is useful to test the error handling of
7 modules that can be used to test the following notifiers.
15 ----------------------------------
18 /sys/kernel/debug/notifier-error-inject/pm/actions/<notifier event>/error
26 Example: Inject PM suspend error (-12 = -ENOMEM)::
28 # cd /sys/kernel/debug/notifier-error-inject/pm/
29 # echo -12 > actions/PM_SUSPEND_PREPARE/error
34 ----------------------------------------------
37 /sys/kernel/debug/notifier-error-inject/memory/actions/<notifier event>/error
44 Example: Inject memory hotplug offline error (-12 == -ENOMEM)::
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/Documentation/arch/powerpc/
Dcpu_features.rst2 CPU Features
8 This document describes the system (including self-modifying code) used in the
10 compile-time selection.
12 Early in the boot process the ppc32 kernel detects the current CPU type and
14 split instruction and data caches, and if the CPU supports the DOZE and NAP
23 C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a
28 several paths that are performance-critical and would suffer if an array
30 performance penalty but still allow for runtime (rather than compile-time) CPU
32 based on CPU 0's capabilities, so a multi-processor system with non-identical
48 If CPU 0 supports Altivec, the code is left untouched. If it doesn't, both
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Delf_hwcaps.rst11 ---------------
13 Some hardware or software features are only available on some CPU
19 Userspace software can test for features by acquiring the AT_HWCAP or
36 HWCAP is the preferred method to test for the presence of a feature rather
41 test for required or implied features. For example if the program requires
42 FPU, VMX, VSX, it is not necessary to test those HWCAPs, and it may be
46 -------------
56 -------------
65 -------------------
67 HWCAPs are allocated as described in Power Architecture 64-Bit ELF V2 ABI
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/Documentation/power/
Dbasic-pm-debugging.rst18 test at least a couple of times in a row for confidence. [This is necessary,
21 modes causes the PM core to skip some platform-related callbacks which on ACPI
44 a) Test modes of hibernation
45 ----------------------------
50 core run in a test mode. There are 5 test modes available:
53 - test the freezing of processes
56 - test the freezing of processes and suspending of devices
59 - test the freezing of processes, suspending of devices and platform
63 - test the freezing of processes, suspending of devices, platform
67 - test the freezing of processes, suspending of devices, platform global
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/Documentation/mm/
Dhwpoison.rst21 When the current CPU tries to consume corruption the currently
41 The code consists of a the high level handler in mm/memory-failure.c,
46 of applications. KVM support requires a recent qemu-kvm release.
109 * madvise(MADV_HWPOISON, ....) (as root) - Poison a page in the
112 * hwpoison-inject module through debugfs ``/sys/kernel/debug/hwpoison/``
114 corrupt-pfn
116 some early filtering to avoid corrupted unintended pages in test suites.
118 unpoison-pfn
119 Software-unpoison page at PFN echoed into this file. This way
127 corrupt-filter-dev-major, corrupt-filter-dev-minor
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/Documentation/dev-tools/
Dkselftest.rst11 from mainline offers the best coverage. Several test rings run mainline
12 kselftest suite on stable releases. The reason is that when a new test
13 gets added to test existing code to regression test a bug, we should be
14 able to run that test on an older kernel. Hence, it is important to keep
15 code that can still test an older kernel and make sure it skips the test
23 On some systems, hot-plug tests could hang forever waiting for cpu and
24 memory to be ready to be offlined. A special hot-plug target is created
25 to run the full range of hot-plug tests. In default mode, hot-plug tests run
26 in safe mode with a limited scope. In limited mode, cpu-hotplug test is
27 run on a single cpu as opposed to all hotplug capable cpus, and memory
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/Documentation/hwmon/
Dasus_wmi_sensors.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
7 * PRIME X399-A,
8 * PRIME X470-PRO,
11 * ROG CROSSHAIR VI HERO (WI-FI AC),
13 * ROG CROSSHAIR VII HERO (WI-FI),
14 * ROG STRIX B450-E GAMING,
15 * ROG STRIX B450-F GAMING,
16 * ROG STRIX B450-I GAMING,
17 * ROG STRIX X399-E GAMING,
18 * ROG STRIX X470-F GAMING,
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/Documentation/translations/zh_CN/mm/
Dhwpoison.rst42 该代码由mm/memory-failure.c中的高级处理程序、一个新的页面poison位和虚拟机中的
45 现在主要目标是KVM客户机，但它适用于所有类型的应用程序。支持KVM需要最近的qemu-kvm
102 * madvise(MADV_HWPOISON, ....) (as root) - 在测试过程中Poison一个页面
104 * 通过debugfs ``/sys/kernel/debug/hwpoison/`` hwpoison-inject模块
106 corrupt-pfn
109 unpoison-pfn
110 在PFN的Software-unpoison页面对应到这个文件。这样，一个页面可以再次被
115 corrupt-filter-dev-major, corrupt-filter-dev-minor
116 只处理与块设备major/minor定义的文件系统相关的页面的内存故障。-1U是通
119 corrupt-filter-memcg
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/Documentation/translations/zh_CN/core-api/
Dthis_cpu_ops.rst1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/this_cpu_ops.rst
31 读取-修改-写入操作特别值得关注。通常处理器具有特殊的低延迟指令，可以在没有典型同
64 ----------------------
96 int cpu;
98 cpu = get_cpu();
99 y = per_cpu_ptr(&x, cpu);
114 ----------
129 -----------------
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Dworkqueue.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/core-api/workqueue.rst
109 每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
139 参数 - ``@name`` , ``@flags`` 和 ``@max_active`` 。
148 ---------
202 --------------
234 0 w0 starts and burns CPU
236 15 w0 wakes up and burns CPU
238 20 w1 starts and burns CPU
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Dlocal_ops.rst1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: Documentation/core-api/local_ops.rst
51 UP之间没有不同的行为，在你的架构的 ``local.h`` 中包括 ``asm-generic/local.h``
76 以确保它在-rt内核上仍能正确工作。
122 for_each_online_cpu(cpu)
123 sum += local_read(&per_cpu(counters, cpu));
133 /* test-local.c
147 /* IPI called on each CPU. */
151 printk("Increment on cpu %d\n", smp_processor_id());
164 int cpu;
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/Documentation/timers/
Dno_hz.rst2 NO_HZ: Reducing Scheduling-Clock Ticks
7 reduce the number of scheduling-clock interrupts, thereby improving energy
9 some types of computationally intensive high-performance computing (HPC)
10 applications and for real-time applications.
12 There are three main ways of managing scheduling-clock interrupts
13 (also known as "scheduling-clock ticks" or simply "ticks"):
15 1. Never omit scheduling-clock ticks (CONFIG_HZ_PERIODIC=y or
16 CONFIG_NO_HZ=n for older kernels). You normally will -not-
19 2. Omit scheduling-clock ticks on idle CPUs (CONFIG_NO_HZ_IDLE=y or
23 3. Omit scheduling-clock ticks on CPUs that are either idle or that
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/Documentation/admin-guide/pm/
Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
8 collection of features that give more granular control over CPU performance.
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
26 test. Using this tool as an example, customers can replicate the messaging
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
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Damd-pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
5 ``amd-pstate`` CPU Performance Scaling Driver
16 ``amd-pstate`` is the AMD CPU performance scaling driver that introduces a
17 new CPU frequency control mechanism on modern AMD APU and CPU series in
20 than legacy ACPI hardware P-States. Current AMD CPU/APU platforms are using
21 the ACPI P-states driver to manage CPU frequency and clocks with switching
22 only in 3 P-states. CPPC replaces the ACPI P-states controls and allows a
23 flexible, low-latency interface for the Linux kernel to directly
26 ``amd-pstate`` leverages the Linux kernel governors such as ``schedutil``,
30 Volume 2: System Programming [1]_). Currently, ``amd-pstate`` supports basic
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/Documentation/trace/coresight/
Dcoresight-perf.rst1 .. SPDX-License-Identifier: GPL-2.0
4 CoreSight - Perf
15 perf record -e cs_etm//u testbinary
17 This would run some test binary (testbinary) until it exits and record
22 perf report --stdio --dump -i perf.data
26 …ERF_RECORD_AUXTRACE size: 0x11dd0 offset: 0 ref: 0x1b614fc1061b0ad1 idx: 0 tid: 531230 cpu: -1
48 for the support such as libopencsd and libopencsd-dev or download it
60 ------------------------
81 Perf test - Verify kernel and userspace perf CoreSight work
82 -----------------------------------------------------------
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/Documentation/core-api/
Dthis_cpu_ops.rst8 this_cpu operations are a way of optimizing access to per cpu
11 the cpu permanently stored the beginning of the per cpu area for a
14 this_cpu operations add a per cpu variable offset to the processor
15 specific per cpu base and encode that operation in the instruction
16 operating on the per cpu variable.
24 Read-modify-write operations are of particular interest. Frequently
32 synchronization is not necessary since we are dealing with per cpu
37 Please note that accesses by remote processors to a per cpu area are
65 ------------------------------------
68 per cpu area. It is then possible to simply use the segment override
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/Documentation/translations/zh_CN/scheduler/
Dsched-design-CFS.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/scheduler/sched-design-CFS.rst
23 “理想的多任务CPU”是一种（不存在的 :-)）具有100%物理算力的CPU，它能让每个任务精确地以
25 任务获得50%物理算力。 --- 也就是说，真正的并行。
36 在CFS中，虚拟运行时间由每个任务的p->se.vruntime（单位为纳秒）的值表达和跟踪。因此，
39 一些细节：在“理想的”硬件上，所有的任务在任何时刻都应该具有一样的p->se.vruntime值，
40 --- 也就是说，任务应当同时执行，没有任务会在“理想的”CPU分时中变得“不平衡”。
42 CFS的任务选择逻辑基于p->se.vruntime的值，因此非常简单：总是试图选择p->se.vruntime值
58 CFS同样维护了rq->cfs.min_vruntime值，它是单调递增的，跟踪运行队列中的所有任务的最小
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/Documentation/staging/
Dstatic-keys.rst30 performance-sensitive fast-path kernel code, via a GCC feature and a code
74 https://gcc.gnu.org/ml/gcc-patches/2009-07/msg01556.html
77 by default, without the need to check memory. Then, at run-time, we can patch
86 consist of a single atomic 'no-op' instruction (5 bytes on x86), in the
87 straight-line code path. When the branch is 'flipped', we will patch the
88 'no-op' in the straight-line codepath with a 'jump' instruction to the
89 out-of-line true branch. Thus, changing branch direction is expensive but
110 allocated at run-time.
158 particularly the CPU hotplug lock (in order to avoid races against
185 simply fall back to a traditional, load, test, and jump sequence. Also, the
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