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/Documentation/watchdog/
Dmlx-wdt.rst16 Actual HW timeout can be defined as a power of 2 msec.
17 e.g. timeout 20 sec will be rounded up to 32768 msec.
18 The maximum timeout period is 32 sec (32768 msec.),
19 Get time-left isn't supported
22 Actual HW timeout is defined in sec. and it's the same as
23 a user-defined timeout.
24 Maximum timeout is 255 sec.
25 Get time-left is supported.
28 Same as Type 2 with extended maximum timeout period.
29 Maximum timeout is 65535 sec.
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/Documentation/devicetree/bindings/watchdog/
Dts4800-wdt.txt4 - compatible: must be "technologic,ts4800-wdt"
5 - syscon: phandle / integer array that points to the syscon node which
7 - phandle to FPGA's syscon
8 - offset to the watchdog register
11 - timeout-sec: contains the watchdog timeout in seconds.
16 compatible = "syscon", "simple-mfd";
18 reg-io-width = <2>;
21 compatible = "technologic,ts4800-wdt";
23 timeout-sec = <10>;
Dmarvel.txt5 - Compatibility : "marvell,orion-wdt"
6 "marvell,armada-370-wdt"
7 "marvell,armada-xp-wdt"
8 "marvell,armada-375-wdt"
9 "marvell,armada-380-wdt"
11 - reg : Should contain two entries: first one with the
15 For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
17 - reg : A third entry is mandatory and should contain the
20 Clocks required for compatibles = "marvell,orion-wdt",
21 "marvell,armada-370-wdt":
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Dst_lpc_wdt.txt1 STMicroelectronics Low Power Controller (LPC) - Watchdog
7 [See: ../rtc/rtc-st-lpc.txt for RTC options]
8 [See: ../timer/st,stih407-lpc for Clocksource options]
12 - compatible : Should be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
26 - timeout-sec : Watchdog timeout in seconds
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Dmediatek,mtk-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
13 The watchdog supports a pre-timeout interrupt that fires
14 timeout-sec/2 before the expiry.
17 - $ref: watchdog.yaml#
22 - enum:
23 - mediatek,mt2712-wdt
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Domap-wdt.txt4 - compatible : "ti,omap3-wdt" for OMAP3 or "ti,omap4-wdt" for OMAP4
5 - ti,hwmods : Name of the hwmod associated to the WDT
8 - timeout-sec : default watchdog timeout in seconds
13 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
Dsprd,sp9860-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/sprd,sp9860-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 - $ref: watchdog.yaml#
19 const: sprd,sp9860-wdt
30 clock-names:
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Dnuvoton,npcm-wdt.txt3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
4 The watchdog supports a pre-timeout interrupt that fires 10ms before the
8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or
9 "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or
10 "nuvoton,npcm845-wdt" for NPCM845 (Arbel).
11 - reg : Offset and length of the register set for the device.
12 - interrupts : Contain the timer interrupt with flags for
16 - clocks : phandle of timer reference clock.
17 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
21 - timeout-sec : Contains the watchdog timeout in seconds
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Dcdns,wdt-r1p2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/cdns,wdt-r1p2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neeli Srinivas <srinivas.neeli@amd.com>
15 a programmable reset period. The timeout period varies from 1 ms
19 - $ref: watchdog.yaml#
24 - cdns,wdt-r1p2
35 reset-on-timeout:
42 - compatible
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Dwatchdog.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guenter Roeck <linux@roeck-us.net>
11 - Wim Van Sebroeck <wim@linux-watchdog.org>
20 pattern: "^watchdog(@.*|-([0-9]|[1-9][0-9]+))?$"
24 pattern: "^(timer|watchdog)(@.*|-([0-9]|[1-9][0-9]+))?$"
26 timeout-sec:
28 Contains the watchdog timeout in seconds.
Drealtek,otto-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sander Vanheule <sander@svanheule.net>
13 The timer has two timeout phases. Both phases have a maximum duration of 32
17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
18 - Phase 2: Starts after phase 1 has timed out, and only serves to give the
24 - $ref: watchdog.yaml#
29 - realtek,rtl8380-wdt
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Datmel,at91sam9-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/watchdog/atmel,at91sam9-wdt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eugen Hristev <eugen.hristev@microchip.com>
15 const: atmel,at91sam9260-wdt
26 atmel,max-heartbeat-sec:
32 atmel,min-heartbeat-sec:
35 must be smaller than the max-heartbeat-sec value. It is used to
39 atmel,watchdog-type:
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Darm,sbsa-gwdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/arm,sbsa-gwdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fu Wei <fu.wei@linaro.org>
14 two stages of timeout have elapsed. A detailed definition of the watchdog
15 timer can be found in the ARM document: ARM-DEN-0029 - Server Base System
19 - $ref: watchdog.yaml#
23 const: arm,sbsa-gwdt
27 - description: Watchdog control frame
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Dst,stm32-iwdg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/st,stm32-iwdg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yannick Fertre <yannick.fertre@foss.st.com>
11 - Christophe Roullier <christophe.roullier@foss.st.com>
14 - $ref: watchdog.yaml#
19 - st,stm32-iwdg
20 - st,stm32mp1-iwdg
27 - description: Low speed clock
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Dnxp,pnx4008-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/nxp,pnx4008-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Roland Stigge <stigge@antcom.de>
13 - $ref: watchdog.yaml#
17 const: nxp,pnx4008-wdt
23 - compatible
24 - reg
29 - |
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Darm-smc-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/arm-smc-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Julius Werner <jwerner@chromium.org>
13 - $ref: watchdog.yaml#
18 - arm,smc-wdt
20 arm,smc-id:
27 - compatible
32 - |
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Dfsl,scu-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl,scu-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Watchdog Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
16 - $ref: watchdog.yaml#
21 - enum:
22 - fsl,imx8dxl-sc-wdt
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Dtechnologic,ts7200-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/technologic,ts7200-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Technologic Systems TS-72xx based SBCs watchdog
10 - Nikita Shubin <nikita.shubin@maquefel.me>
13 - $ref: watchdog.yaml#
18 - const: technologic,ts7200-wdt
19 - items:
20 - enum:
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Dmaxim,max63xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <maz@kernel.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 - $ref: watchdog.yaml#
15 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
20 - maxim,max6369
21 - maxim,max6370
22 - maxim,max6371
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Dtoshiba,visconti-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/watchdog/toshiba,visconti-wdt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
14 - $ref: watchdog.yaml#
19 - toshiba,visconti-wdt
28 - compatible
29 - reg
30 - clocks
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Dcnxt,cx92755-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/cnxt,cx92755-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Baruch Siach <baruch@tkos.co.il>
19 - $ref: watchdog.yaml#
23 const: cnxt,cx92755-wdt
32 - compatible
33 - reg
34 - clocks
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Drenesas,wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - items:
17 - enum:
18 - renesas,r7s72100-wdt # RZ/A1
19 - renesas,r7s9210-wdt # RZ/A2
20 - const: renesas,rza-wdt # RZ/A
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Dzii,rave-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/zii,rave-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martyn Welch <martyn.welch@collabora.co.uk>
11 - Guenter Roeck <linux@roeck-us.net>
12 - Wim Van Sebroeck <wim@iguana.be>
16 const: zii,rave-wdt
22 reset-duration-ms:
28 - compatible
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Damlogic,meson6-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/amlogic,meson6-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
14 - $ref: watchdog.yaml#
19 - enum:
20 - amlogic,meson6-wdt
21 - amlogic,meson8-wdt
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/Documentation/devicetree/bindings/misc/
Dqemu,vcpu-stall-detector.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/qemu,vcpu-stall-detector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Sebastian Ene <sebastianene@google.com>
19 - qemu,vcpu-stall-detector
24 clock-frequency:
35 timeout-sec:
37 The stall detector expiration timeout measured in seconds.
43 - compatible
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