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/Documentation/devicetree/bindings/serial/
Dmicrochip,pic32-uart.txt1 * Microchip Universal Asynchronous Receiver Transmitter (UART)
4 - compatible: Should be "microchip,pic32mzda-uart"
5 - reg: Should contain registers location and length
6 - interrupts: Should contain interrupt
7 - clocks: Phandle to the clock.
8 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
9 - pinctrl-names: A pinctrl state names "default" must be defined.
10 - pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
11 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
14 - cts-gpios: CTS pin for UART
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Dpl011.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
22 - arm,pl011
24 - compatible
29 - const: arm,pl011
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Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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/Documentation/devicetree/bindings/net/bluetooth/
Dmediatek,bluetooth.txt1 MediaTek UART based Bluetooth Devices
4 This device is a serial attached device to UART device and thus it must be a
5 child node of the serial node with UART.
13 - compatible: Must be
14 "mediatek,mt7663u-bluetooth": for MT7663U device
15 "mediatek,mt7668u-bluetooth": for MT7668U device
16 - vcc-supply: Main voltage regulator
21 - pinctrl-names: Should be "default", "runtime"
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
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Dnxp,88w8987-bt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding describes UART-attached NXP bluetooth chips. These chips
11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth
12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
14 asserts break signal over UART-TX line to put the chip into power save
15 state. De-asserting break wakes up the BT chip.
18 - Neeraj Sanjay Kale <neeraj.sanjaykale@nxp.com>
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/Documentation/devicetree/bindings/mfd/
Daspeed-lpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
21 The LPC controller is represented as a multi-function device to account for the
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
34 Additionally the state of the LPC controller influences the pinmux
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/Documentation/devicetree/bindings/gnss/
Dsirfstar.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
20 SiRF chips can be used over UART, I2C or SPI buses.
23 - $ref: gnss-common.yaml#
24 - $ref: /schemas/serial/serial-peripheral-props.yaml#
29 - csr,gsd4t
30 - csr,csrg05ta03-icje-r
31 - fastrax,uc430
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Dmediatek.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
13 Mediatek chipsets are used in GNSS-receiver modules produced by several
14 vendors and can use a UART interface.
17 - $ref: gnss-common.yaml#
18 - $ref: /schemas/serial/serial-peripheral-props.yaml#
24 vcc-supply:
28 reset-gpios:
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/Documentation/networking/caif/
Dcaif.rst1 .. SPDX-License-Identifier: GPL-2.0
10 :Copyright: |copy| ST-Ericsson AB 2010
40 The use of Start-of-frame-extension (STX) must also be set as
43 Normally Frame Checksum is always used on UART, but this is also provided as a
59 /sys/kernel/debug/caif_serial/<tty-name>/
61 * ser_state: Prints the bit-mask status where
63 - 0x02 means SENDING, this is a transient state.
64 - 0x10 means FLOW_OFF_SENT, i.e. the previous frame has not been sent
68 * tty_status: Prints the bit-mask tty status information
70 - 0x01 - tty->warned is on.
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/Documentation/devicetree/bindings/pinctrl/
Dqcom,ipq8064-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq8064-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,ipq8064-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-ipq8064-tlmm-state"
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Dqcom,apq8064-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,apq8064-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,apq8064-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-apq8064-tlmm-state"
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Dqcom,ipq4019-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq4019-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,ipq4019-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-ipq4019-tlmm-state"
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Dqcom,sm4450-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4450-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tengfei Fan <quic_tengfan@quicinc.com>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm4450-tlmm
26 interrupt-controller: true
27 "#interrupt-cells": true
28 gpio-controller: true
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Dqcom,ipq5018-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,ipq5018-tlmm
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
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Dqcom,sdx75-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdx75-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rohit Agarwal <quic_rohiagar@quicinc.com>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sdx75-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
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Dqcom,msm8909-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8909-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,msm8909-tlmm
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-msm8909-tlmm-state"
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Dqcom,apq8084-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,apq8084-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,apq8084-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-apq8084-tlmm-state"
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Dqcom,sm7150-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm7150-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Danila Tikhonov <danila@jiaxyga.com>
17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21 const: qcom,sm7150-tlmm
26 reg-names:
28 - const: west
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Dqcom,sc8180x-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8180x-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sc8180x-tlmm
25 reg-names:
27 - const: west
28 - const: east
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Dqcom,sm8350-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8350-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
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Dqcom,sm8550-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Abel Vesa <abel.vesa@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8550-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
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Dqcom,sm8650-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8650-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
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Dqcom,sm8450-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8450-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
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/Documentation/devicetree/bindings/soc/tegra/
Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/Documentation/driver-api/
Dmiscellaneous.rst4 .. kernel-doc:: include/linux/parport.h
7 .. kernel-doc:: drivers/parport/ieee1284.c
10 .. kernel-doc:: drivers/parport/share.c
13 .. kernel-doc:: drivers/parport/daisy.c
16 16x50 UART Driver
19 .. kernel-doc:: drivers/tty/serial/8250/8250_core.c
24 Pulse-Width Modulation (PWM)
27 Pulse-width modulation is a modulation technique primarily used to
33 are expected to embed this structure in a driver-specific structure.
39 active state of the signal.
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