Searched +full:wait +full:- +full:on +full:- +full:read (Results 1 – 25 of 181) sorted by relevance
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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| D | st,stm32-fmc2-ebi-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
25 8: Synchronous read synchronous write PSRAM.
26 9: Synchronous read asynchronous write PSRAM.
27 10: Synchronous read synchronous write NOR.
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| D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
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| D | ti-aemif.txt | 4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
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| /Documentation/block/ |
| D | stat.rst | 29 read I/Os requests number of read I/Os processed
30 read merges requests number of read I/Os merged with in-queue I/O
31 read sectors sectors number of sectors read
32 read ticks milliseconds total wait time for read requests
34 write merges requests number of write I/Os merged with in-queue I/O
36 write ticks milliseconds total wait time for write requests
39 time_in_queue milliseconds total wait time for all requests
41 discard merges requests number of discard I/Os merged with in-queue I/O
43 discard ticks milliseconds total wait time for discard requests
45 flush ticks milliseconds total wait time for flush requests
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| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 external memory (such as NAND or other memory-mapped peripherals) whereas
16 data lines (16 bits), OE (output enable), ADV (address valid, used on some
17 NOR flash memories), WE (write enable). This on top of 6 different chip selects
20 Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
21 and the bus can only come out on these pins, however if some of the pins are
25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
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| /Documentation/RCU/ |
| D | rcu.rst | 6 The basic idea behind RCU (read-copy update) is to split destructive
11 since dropped their references. For example, an RCU-protected deletion
12 from a linked list would first remove the item from the list, wait for
14 information on using RCU with linked lists.
17 --------------------------
19 - Why would anyone want to use RCU?
21 The advantage of RCU's two-part approach is that RCU readers need
23 shared memory, or (on CPUs other than Alpha) execute any memory
25 on modern CPUs is what gives RCU its performance advantages
26 in read-mostly situations. The fact that RCU readers need not
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| D | checklist.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 would cause. This list is based on experiences reviewing such patches
14 0. Is RCU being applied to a read-mostly situation? If the data
18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
24 is the dynamic NMI code in the Linux 2.6 kernel, at least on
27 Yet another exception is where the low real-time latency of RCU's
28 read-side primitives is critically important.
33 counter-intuitive situation where rcu_read_lock() and
48 memory barriers on weakly ordered machines (pretty much all of
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| D | UP.rst | 3 RCU on Uniprocessor Systems
6 A common misconception is that, on UP systems, the call_rcu() primitive
9 wait for anything else to get done, since there are no other CPUs for
10 anything else to be happening on. Although this approach will *sort of*
16 --------------------------
18 Suppose that an RCU-based algorithm scans a linked list containing
20 this same list in softirq context. Suppose that the process-context scan
33 Example 2: Function-Call Fatality
34 ---------------------------------
40 Suppose that an RCU-based algorithm again scans a linked list containing
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| D | rcubarrier.rst | 8 RCU updaters sometimes use call_rcu() to initiate an asynchronous wait for
10 struct placed within the RCU-protected data structure and another pointer
16 call_rcu(&p->rcu, p_callback);
30 -------------------------------------
37 http://lwn.net/images/ns/kernel/rcu-drop.jpg.
39 We could try placing a synchronize_rcu() in the module-exit code path,
40 but this is not sufficient. Although synchronize_rcu() does wait for a
41 grace period to elapse, it does not wait for the callbacks to complete.
43 One might be tempted to try several back-to-back synchronize_rcu()
45 heavy RCU-callback load, then some of the callbacks might be deferred in
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| /Documentation/ABI/testing/ |
| D | debugfs-hisi-zip | 3 Contact: linux-crypto@vger.kernel.org
7 What: /sys/kernel/debug/hisi_zip/<bdf>/decomp_core[0-5]/regs
9 Contact: linux-crypto@vger.kernel.org
15 Contact: linux-crypto@vger.kernel.org
16 Description: Compression/decompression core debug registers read clear
17 control. 1 means enable register read clear, otherwise 0.
24 Contact: linux-crypto@vger.kernel.org
31 Contact: linux-crypto@vger.kernel.org
41 Contact: linux-crypto@vger.kernel.org
48 Contact: linux-crypto@vger.kernel.org
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| D | debugfs-hisi-hpre | 1 What: /sys/kernel/debug/hisi_hpre/<bdf>/cluster[0-3]/regs
3 Contact: linux-crypto@vger.kernel.org
7 What: /sys/kernel/debug/hisi_hpre/<bdf>/cluster[0-3]/cluster_ctrl
9 Contact: linux-crypto@vger.kernel.org
11 and then we can read the debug information of the core.
16 Contact: linux-crypto@vger.kernel.org
17 Description: HPRE cores debug registers read clear control. 1 means enable
18 register read clear, otherwise 0. Writing to this file has no
25 Contact: linux-crypto@vger.kernel.org
32 Contact: linux-crypto@vger.kernel.org
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| D | debugfs-hisi-sec | 3 Contact: linux-crypto@vger.kernel.org
7 Only available for PF, and take no other effect on SEC.
11 Contact: linux-crypto@vger.kernel.org
19 Contact: linux-crypto@vger.kernel.org
29 Contact: linux-crypto@vger.kernel.org
36 Contact: linux-crypto@vger.kernel.org
43 Contact: linux-crypto@vger.kernel.org
47 Only available for PF, and take no other effect on SEC.
51 Contact: linux-crypto@vger.kernel.org
54 Available for both PF and VF, and take no other effect on SEC.
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| /Documentation/misc-devices/ |
| D | spear-pcie-gadget.rst | 1 .. SPDX-License-Identifier: GPL-2.0
28 This driver has several nodes which can be read/written by configfs interface.
36 read behavior of nodes:
37 -----------------------
53 ------------------------
61 inta write 1 to assert INTA and 0 to de-assert.
70 so read back bar size and address after writing to cross check.
83 #mount -t configfs none /Config
124 It will have to be insured that, once link up is done on gadget, then only host
125 is initialized and start to search PCIe devices on its port.
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| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 5 First of all, what I know about uGuru is no fact based on any help, hints or
6 datasheet from Abit. The data I have got on uGuru have I assembled through
14 Olle Sandberg <ollebull@gmail.com>, 2005-05-25
19 and extended with write support and info on more databanks, the write support
27 Hans de Goede <j.w.r.degoede@hhs.nl>, 28-01-2006
33 As far as known the uGuru is always placed at and using the (ISA) I/O-ports
34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
39 present. We have to check for two different values at data-port, because
41 later on attached again data-port will hold 0x08, more about this later.
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| /Documentation/driver-api/mmc/ |
| D | mmc-dev-attrs.rst | 8 The following attributes are read/write.
11 force_ro Enforce read-only access even if write protect switch is off.
17 All attributes are read-only.
45 Note on Erase Size and Preferred Erase Size:
52 if the card is block-addressed, 0 otherwise.
58 1. A single erase command will make all other I/O on
59 the card wait. This is not a problem if the whole card
61 I/O for another partition on the same card wait for the
62 duration of the erase - which could be a several
76 For MMC, "preferred_erase_size" is the high-capacity
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| /Documentation/input/joydev/ |
| D | joystick-api.rst | 1 .. _joystick-api:
7 :Author: Ragnar Hojland Espinosa <ragnar@macula.net> - 7 Aug 1998
18 driver now reports only any changes of its state. See joystick-api.txt,
35 (JS_EVENT_INIT) that you can read to obtain the initial state of the
49 read (fd, &e, sizeof(e));
60 If the read is successful, it will return sizeof(e), unless you wanted to read
61 more than one event per read as described in section 3.1.
65 -------------
74 events on open. That is, if it's issuing an INIT BUTTON event, the
86 ---------------
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| /Documentation/filesystems/spufs/ |
| D | spufs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 spufs - the SPU file system
16 The SPU file system is used on PowerPC machines that implement the Cell
21 message queues. Users that have write permissions on the file system
26 logical SPU. Users can change permissions on those files, but not actu-
43 The files in spufs mostly follow the standard behavior for regular sys-
44 tem calls like read(2) or write(2), but often support only a subset of
45 the operations supported on regular file systems. This list details the
49 All files that support the read(2) operation also support readv(2) and
55 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera-
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| /Documentation/RCU/Design/Requirements/ |
| D | Requirements.rst | 10 `LWN <https://lwn.net/>`_ on those articles:
16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
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| /Documentation/locking/ |
| D | ww-mutex-design.rst | 2 Wound/Wait Deadlock-Proof Mutex Design
5 Please read mutex-design.rst first, as it applies to wait/wound mutexes too.
7 Motivation for WW-Mutexes
8 -------------------------
12 domains (for example VRAM vs system memory), and so on. And with
14 a handful of situations where the driver needs to wait for buffers to
15 become ready. If you think about this in terms of waiting on a buffer
22 buffer(s) into VRAM before the GPU operates on the buffer(s), which
37 and the deadlock handling approach is called Wait-Die. The name is based on
41 and dies. Hence Wait-Die.
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| /Documentation/iio/ |
| D | iio_devbuf.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 The Industrial I/O core offers a way for continuous data capture based on a
11 trigger source. Multiple data channels can be read at once from
14 Devices with buffer support feature an additional sub-directory in the
25 ----------
27 Read / Write attribute which states the total number of data samples (capacity)
31 ----------
33 Read / Write attribute which starts / stops the buffer capture. This file should
34 be written last, after length and selection of scan elements. Writing a non-zero
39 -------------
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| /Documentation/driver-api/dmaengine/ |
| D | client.rst | 8 ``Documentation/crypto/async-tx-api.rst``
11 Below is a guide to device driver writers on how to use the Slave-DMA API of the
19 - Allocate a DMA slave channel
21 - Set slave and controller specific parameters
23 - Get a descriptor for transaction
25 - Submit the transaction
27 - Issue pending requests and wait for callback notification
40 .. code-block:: c
66 .. code-block:: c
79 DMA-engine are:
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| /Documentation/filesystems/ext4/ |
| D | mmp.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 -------------------------
9 etc.), the MMP code running on the node (call it node A) checks a
13 open code will wait for twice the specified MMP check interval and check
15 filesystem is active on another machine and the open fails. If the MMP
19 While the filesystem is live, the kernel sets up a timer to re-check the
20 MMP block at the specified MMP check interval. To perform the re-check,
21 the MMP sequence number is re-read; if it does not match the in-memory
23 filesystem, and node A remounts the filesystem read-only. If the
25 memory and on disk, and the re-check is complete.
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| /Documentation/userspace-api/media/v4l/ |
| D | func-select.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-select:
13 v4l2-select - Synchronous I/O multiplexing
18 .. code-block:: c
30 The highest-numbered file descriptor in any of the three sets, plus 1.
33 File descriptions to be watched if a read() call won't block.
42 Maximum time to wait.
56 On success :c:func:`select()` returns the total number of bits set in
58 a value of zero. On failure it returns -1 and the ``errno`` variable is
66 When use of the :c:func:`read()` function has been negotiated and the
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| /Documentation/admin-guide/mm/ |
| D | soft-dirty.rst | 2 Soft-Dirty PTEs
5 The soft-dirty is a bit on a PTE which helps to track which pages a task
8 1. Clear soft-dirty bits from the task's PTEs.
13 2. Wait some time.
15 3. Read soft-dirty bits from the PTEs.
18 64-bit qword is the soft-dirty one. If set, the respective PTE was
23 when the soft-dirty bit is cleared. So, after this, when the task tries to
25 the soft-dirty bit on the respective PTE.
28 soft-dirty bits clear, the #PF-s that occur after that are processed fast.
30 the kernel does is finds this fact out and puts both writable and soft-dirty
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