Searched refs:__aligned_u64 (Results 1 – 25 of 43) sorted by relevance
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82 __aligned_u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */101 __aligned_u64 vaddr;103 __aligned_u64 tidlist;134 __aligned_u64 sc_credits_addr;139 __aligned_u64 pio_bufbase_sop;144 __aligned_u64 pio_bufbase;146 __aligned_u64 rcvhdr_bufbase;148 __aligned_u64 rcvegr_bufbase;150 __aligned_u64 sdma_comp_bufbase;158 __aligned_u64 user_regbase;[all …]
58 __aligned_u64 key;59 __aligned_u64 gts_key;60 __aligned_u64 memsize;73 __aligned_u64 ma_sync_key;74 __aligned_u64 sq_key;75 __aligned_u64 rq_key;76 __aligned_u64 sq_db_gts_key;77 __aligned_u64 rq_db_gts_key;78 __aligned_u64 sq_memsize;79 __aligned_u64 rq_memsize;[all …]
40 __aligned_u64 buf_addr;41 __aligned_u64 db_addr;51 __aligned_u64 cqn; /* Only 32 bits used, 64 for compat */52 __aligned_u64 cap_flags;64 __aligned_u64 buf_addr;65 __aligned_u64 db_addr;66 __aligned_u64 que_addr;88 __aligned_u64 buf_addr;89 __aligned_u64 db_addr;94 __aligned_u64 sdb_addr;[all …]
66 __aligned_u64 db_pa;87 __aligned_u64 rsvd1;96 __aligned_u64 addr;97 __aligned_u64 len;104 __aligned_u64 db_rec_addr;113 __aligned_u64 sq_addr;116 __aligned_u64 sq_len;120 __aligned_u64 rq_addr;123 __aligned_u64 rq_len;142 __aligned_u64 sq_db_rec_addr;[all …]
58 __aligned_u64 ah_tbl_page;63 __aligned_u64 rsvd1;64 __aligned_u64 rsvd2;90 __aligned_u64 page_addr[MAX_CQ_PAGES];91 __aligned_u64 db_page_addr;95 __aligned_u64 rsvd1;96 __aligned_u64 rsvd2;118 __aligned_u64 sq_page_addr[MAX_QP_PAGES];119 __aligned_u64 rq_page_addr[MAX_QP_PAGES];120 __aligned_u64 db_page_addr;[all …]
154 __aligned_u64 buf_addr;165 __aligned_u64 buf_addr;171 __aligned_u64 buf_addr;182 __aligned_u64 rbuf_addr;183 __aligned_u64 sbuf_addr;186 __aligned_u64 qp_addr;196 __aligned_u64 swap_val;197 __aligned_u64 compare_val;198 __aligned_u64 swap_mask;199 __aligned_u64 compare_mask;[all …]
73 __aligned_u64 comp_mask;83 __aligned_u64 comp_mask;102 __aligned_u64 cq_va;103 __aligned_u64 cq_handle;115 __aligned_u64 comp_mask;119 __aligned_u64 cq_va;127 __aligned_u64 qpsva;128 __aligned_u64 qprva;129 __aligned_u64 qp_handle;130 __aligned_u64 comp_mask;[all …]
20 __aligned_u64 cq_key;28 __aligned_u64 sq_key;29 __aligned_u64 rq_key;46 __aligned_u64 srq_key;80 __aligned_u64 laddr;108 __aligned_u64 id;115 __aligned_u64 raddr;116 __aligned_u64 base_mr;120 __aligned_u64 access;126 __aligned_u64 id;[all …]
14 __aligned_u64 db_record_va;15 __aligned_u64 qbuf_va;26 __aligned_u64 db_record_va;27 __aligned_u64 qbuf_va;44 __aligned_u64 sdb;45 __aligned_u64 rdb;46 __aligned_u64 cdb;
80 __aligned_u64 buf_addr;81 __aligned_u64 db_addr;90 __aligned_u64 buf_addr;94 __aligned_u64 buf_addr;95 __aligned_u64 db_addr;104 __aligned_u64 rx_hash_fields_mask; /* Use enum mlx4_ib_rx_hash_fields */113 __aligned_u64 buf_addr;114 __aligned_u64 db_addr;123 __aligned_u64 buf_addr;124 __aligned_u64 db_addr;[all …]
34 __aligned_u64 comp_mask;43 __aligned_u64 feature_flags;44 __aligned_u64 db_mmap_key;55 __aligned_u64 comp_mask;66 __aligned_u64 user_cq_buffer;70 __aligned_u64 user_cq_buf;71 __aligned_u64 user_shadow_area;75 __aligned_u64 user_wqe_bufs;76 __aligned_u64 user_compl_ctx;109 __aligned_u64 push_wqe_mmap_key;[all …]
132 __aligned_u64 element;138 __aligned_u64 cq_handle;165 __aligned_u64 response;172 __aligned_u64 response;173 __aligned_u64 driver_data[];179 __aligned_u64 driver_data[];183 __aligned_u64 response;184 __aligned_u64 driver_data[];188 __aligned_u64 fw_ver;191 __aligned_u64 max_mr_size;[all …]
76 __aligned_u64 wr_id;86 __aligned_u64 remote_addr;93 __aligned_u64 remote_addr;98 __aligned_u64 remote_addr;99 __aligned_u64 compare_add;100 __aligned_u64 swap;114 __aligned_u64 addr;115 __aligned_u64 length;126 __aligned_u64 reserved;136 __aligned_u64 addr;[all …]
91 __aligned_u64 uid;92 __aligned_u64 response;103 __aligned_u64 response;113 __aligned_u64 response;154 __aligned_u64 response;160 __aligned_u64 node_guid;172 __aligned_u64 node_guid;231 __aligned_u64 uid;251 __aligned_u64 response;262 __aligned_u64 response; /* rdma_ucm_create_id_resp */[all …]
24 __aligned_u64 buf_addr;36 __aligned_u64 sq_buf_addr;49 __aligned_u64 queue_buf[4];58 __aligned_u64 wq_buf_addr;69 __aligned_u64 rx_hash_fields_mask;83 __aligned_u64 num_entries;
76 __aligned_u64 q_mmap_key;77 __aligned_u64 q_mmap_size;81 __aligned_u64 db_mmap_key;109 __aligned_u64 rq_mmap_key;110 __aligned_u64 rq_mmap_size;111 __aligned_u64 rq_db_mmap_key;112 __aligned_u64 sq_db_mmap_key;113 __aligned_u64 llq_desc_mmap_key;
77 __aligned_u64 arm_db_page;78 __aligned_u64 set_db_page;96 __aligned_u64 db_page;107 __aligned_u64 sq_db_page;108 __aligned_u64 rq_db_page;
99 __aligned_u64 lib_caps;153 __aligned_u64 hca_core_clock_offset;175 __aligned_u64 rx_hash_fields_mask; /* enum mlx5_rx_hash_fields */289 __aligned_u64 buf_addr;290 __aligned_u64 db_addr;306 __aligned_u64 buf_addr;313 __aligned_u64 buf_addr;314 __aligned_u64 db_addr;332 __aligned_u64 buf_addr;333 __aligned_u64 db_addr;[all …]
62 __aligned_u64 wr_id;79 __aligned_u64 cookie;107 __aligned_u64 flags;112 __aligned_u64 vport_steering_icm_rx;113 __aligned_u64 vport_steering_icm_tx;
93 __aligned_u64 flags;94 __aligned_u64 pidfd;95 __aligned_u64 child_tid;96 __aligned_u64 parent_tid;97 __aligned_u64 exit_signal;98 __aligned_u64 stack;99 __aligned_u64 stack_size;100 __aligned_u64 tls;101 __aligned_u64 set_tid;102 __aligned_u64 set_tid_size;[all …]
93 __aligned_u64 start;94 __aligned_u64 last;136 __aligned_u64 allowed_iovas;137 __aligned_u64 out_iova_alignment;169 __aligned_u64 allowed_iovas;210 __aligned_u64 user_va;211 __aligned_u64 length;212 __aligned_u64 iova;241 __aligned_u64 length;242 __aligned_u64 dst_iova;[all …]
198 __aligned_u64 timestamp_us;219 __aligned_u64 timestamp_us;248 __aligned_u64 data;263 __aligned_u64 reserved3;276 __aligned_u64 fill_blocks;305 __aligned_u64 size;323 __aligned_u64 directory_path;331 __aligned_u64 file_name;338 __aligned_u64 file_attr;368 __aligned_u64 signature_info;[all …]
31 __aligned_u64 diag_inode;106 __aligned_u64 peer_gid; /* Peer GID */107 __aligned_u64 my_gid; /* My GID */108 __aligned_u64 token; /* Token of DMB */109 __aligned_u64 peer_token; /* Token of remote DMBE */110 __aligned_u64 peer_gid_ext; /* Peer GID (extended part) */111 __aligned_u64 my_gid_ext; /* My GID (extended part) */
72 __aligned_u64 tx_packets;73 __aligned_u64 tx_bytes;74 __aligned_u64 tx_errors;75 __aligned_u64 rx_packets;76 __aligned_u64 rx_bytes;77 __aligned_u64 rx_seq_discards;78 __aligned_u64 rx_oos_packets;79 __aligned_u64 rx_errors;
292 __aligned_u64 size; /* Region size (bytes) */293 __aligned_u64 offset; /* Region offset from start of device fd */309 __aligned_u64 offset; /* Offset of mmap'able area within region */310 __aligned_u64 size; /* Size of mmap'able area */465 __aligned_u64 pending_bytes;466 __aligned_u64 data_offset;467 __aligned_u64 data_size;491 __aligned_u64 tgt;831 __aligned_u64 drm_format_mod; /* tiled mode */879 __aligned_u64 offset; /* device fd offset of write */[all …]