1 /*
2 * arch/arm64/kernel/topology.c
3 *
4 * Copyright (C) 2011,2013,2014 Linaro Limited.
5 *
6 * Based on the arm32 version written by Vincent Guittot in turn based on
7 * arch/sh/kernel/topology.c
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13
14 #include <linux/acpi.h>
15 #include <linux/arch_topology.h>
16 #include <linux/cacheinfo.h>
17 #include <linux/cpufreq.h>
18 #include <linux/init.h>
19 #include <linux/percpu.h>
20
21 #include <asm/cpu.h>
22 #include <asm/cputype.h>
23 #include <asm/topology.h>
24
25 #include <trace/hooks/topology.h>
26
27 #ifdef CONFIG_ACPI
acpi_cpu_is_threaded(int cpu)28 static bool __init acpi_cpu_is_threaded(int cpu)
29 {
30 int is_threaded = acpi_pptt_cpu_is_thread(cpu);
31
32 /*
33 * if the PPTT doesn't have thread information, assume a homogeneous
34 * machine and return the current CPU's thread state.
35 */
36 if (is_threaded < 0)
37 is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
38
39 return !!is_threaded;
40 }
41
42 /*
43 * Propagate the topology information of the processor_topology_node tree to the
44 * cpu_topology array.
45 */
parse_acpi_topology(void)46 int __init parse_acpi_topology(void)
47 {
48 int cpu, topology_id;
49
50 if (acpi_disabled)
51 return 0;
52
53 for_each_possible_cpu(cpu) {
54 topology_id = find_acpi_cpu_topology(cpu, 0);
55 if (topology_id < 0)
56 return topology_id;
57
58 if (acpi_cpu_is_threaded(cpu)) {
59 cpu_topology[cpu].thread_id = topology_id;
60 topology_id = find_acpi_cpu_topology(cpu, 1);
61 cpu_topology[cpu].core_id = topology_id;
62 } else {
63 cpu_topology[cpu].thread_id = -1;
64 cpu_topology[cpu].core_id = topology_id;
65 }
66 topology_id = find_acpi_cpu_topology_cluster(cpu);
67 cpu_topology[cpu].cluster_id = topology_id;
68 topology_id = find_acpi_cpu_topology_package(cpu);
69 cpu_topology[cpu].package_id = topology_id;
70 }
71
72 return 0;
73 }
74 #endif
75
76 #ifdef CONFIG_ARM64_AMU_EXTN
77 #define read_corecnt() read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0)
78 #define read_constcnt() read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0)
79 #else
80 #define read_corecnt() (0UL)
81 #define read_constcnt() (0UL)
82 #endif
83
84 #undef pr_fmt
85 #define pr_fmt(fmt) "AMU: " fmt
86
87 /*
88 * Ensure that amu_scale_freq_tick() will return SCHED_CAPACITY_SCALE until
89 * the CPU capacity and its associated frequency have been correctly
90 * initialized.
91 */
92 static DEFINE_PER_CPU_READ_MOSTLY(unsigned long, arch_max_freq_scale) = 1UL << (2 * SCHED_CAPACITY_SHIFT);
93 static DEFINE_PER_CPU(u64, arch_const_cycles_prev);
94 static DEFINE_PER_CPU(u64, arch_core_cycles_prev);
95 static cpumask_var_t amu_fie_cpus;
96
update_freq_counters_refs(void)97 void update_freq_counters_refs(void)
98 {
99 this_cpu_write(arch_core_cycles_prev, read_corecnt());
100 this_cpu_write(arch_const_cycles_prev, read_constcnt());
101 }
102
freq_counters_valid(int cpu)103 static inline bool freq_counters_valid(int cpu)
104 {
105 if ((cpu >= nr_cpu_ids) || !cpumask_test_cpu(cpu, cpu_present_mask))
106 return false;
107
108 if (!cpu_has_amu_feat(cpu)) {
109 pr_debug("CPU%d: counters are not supported.\n", cpu);
110 return false;
111 }
112
113 if (unlikely(!per_cpu(arch_const_cycles_prev, cpu) ||
114 !per_cpu(arch_core_cycles_prev, cpu))) {
115 pr_debug("CPU%d: cycle counters are not enabled.\n", cpu);
116 return false;
117 }
118
119 return true;
120 }
121
freq_inv_set_max_ratio(int cpu,u64 max_rate)122 void freq_inv_set_max_ratio(int cpu, u64 max_rate)
123 {
124 u64 ratio, ref_rate = arch_timer_get_rate();
125
126 if (unlikely(!max_rate || !ref_rate)) {
127 WARN_ONCE(1, "CPU%d: invalid maximum or reference frequency.\n",
128 cpu);
129 return;
130 }
131
132 /*
133 * Pre-compute the fixed ratio between the frequency of the constant
134 * reference counter and the maximum frequency of the CPU.
135 *
136 * ref_rate
137 * arch_max_freq_scale = ---------- * SCHED_CAPACITY_SCALE²
138 * max_rate
139 *
140 * We use a factor of 2 * SCHED_CAPACITY_SHIFT -> SCHED_CAPACITY_SCALE²
141 * in order to ensure a good resolution for arch_max_freq_scale for
142 * very low reference frequencies (down to the KHz range which should
143 * be unlikely).
144 */
145 ratio = ref_rate << (2 * SCHED_CAPACITY_SHIFT);
146 ratio = div64_u64(ratio, max_rate);
147 if (!ratio) {
148 WARN_ONCE(1, "Reference frequency too low.\n");
149 return;
150 }
151
152 WRITE_ONCE(per_cpu(arch_max_freq_scale, cpu), (unsigned long)ratio);
153 }
154
amu_scale_freq_tick(void)155 static void amu_scale_freq_tick(void)
156 {
157 u64 prev_core_cnt, prev_const_cnt;
158 u64 core_cnt, const_cnt, scale;
159 bool use_amu_fie = true;
160
161 trace_android_vh_use_amu_fie(&use_amu_fie);
162 if(!use_amu_fie)
163 return;
164
165 prev_const_cnt = this_cpu_read(arch_const_cycles_prev);
166 prev_core_cnt = this_cpu_read(arch_core_cycles_prev);
167
168 update_freq_counters_refs();
169
170 const_cnt = this_cpu_read(arch_const_cycles_prev);
171 core_cnt = this_cpu_read(arch_core_cycles_prev);
172
173 if (unlikely(core_cnt <= prev_core_cnt ||
174 const_cnt <= prev_const_cnt))
175 return;
176
177 /*
178 * /\core arch_max_freq_scale
179 * scale = ------- * --------------------
180 * /\const SCHED_CAPACITY_SCALE
181 *
182 * See validate_cpu_freq_invariance_counters() for details on
183 * arch_max_freq_scale and the use of SCHED_CAPACITY_SHIFT.
184 */
185 scale = core_cnt - prev_core_cnt;
186 scale *= this_cpu_read(arch_max_freq_scale);
187 scale = div64_u64(scale >> SCHED_CAPACITY_SHIFT,
188 const_cnt - prev_const_cnt);
189
190 scale = min_t(unsigned long, scale, SCHED_CAPACITY_SCALE);
191 this_cpu_write(arch_freq_scale, (unsigned long)scale);
192 }
193
194 static struct scale_freq_data amu_sfd = {
195 .source = SCALE_FREQ_SOURCE_ARCH,
196 .set_freq_scale = amu_scale_freq_tick,
197 };
198
amu_fie_setup(const struct cpumask * cpus)199 static void amu_fie_setup(const struct cpumask *cpus)
200 {
201 int cpu;
202
203 /* We are already set since the last insmod of cpufreq driver */
204 if (cpumask_available(amu_fie_cpus) &&
205 unlikely(cpumask_subset(cpus, amu_fie_cpus)))
206 return;
207
208 for_each_cpu(cpu, cpus)
209 if (!freq_counters_valid(cpu))
210 return;
211
212 if (!cpumask_available(amu_fie_cpus) &&
213 !zalloc_cpumask_var(&amu_fie_cpus, GFP_KERNEL)) {
214 WARN_ONCE(1, "Failed to allocate FIE cpumask for CPUs[%*pbl]\n",
215 cpumask_pr_args(cpus));
216 return;
217 }
218
219 cpumask_or(amu_fie_cpus, amu_fie_cpus, cpus);
220
221 topology_set_scale_freq_source(&amu_sfd, amu_fie_cpus);
222
223 pr_debug("CPUs[%*pbl]: counters will be used for FIE.",
224 cpumask_pr_args(cpus));
225 }
226
init_amu_fie_callback(struct notifier_block * nb,unsigned long val,void * data)227 static int init_amu_fie_callback(struct notifier_block *nb, unsigned long val,
228 void *data)
229 {
230 struct cpufreq_policy *policy = data;
231
232 if (val == CPUFREQ_CREATE_POLICY)
233 amu_fie_setup(policy->related_cpus);
234
235 /*
236 * We don't need to handle CPUFREQ_REMOVE_POLICY event as the AMU
237 * counters don't have any dependency on cpufreq driver once we have
238 * initialized AMU support and enabled invariance. The AMU counters will
239 * keep on working just fine in the absence of the cpufreq driver, and
240 * for the CPUs for which there are no counters available, the last set
241 * value of arch_freq_scale will remain valid as that is the frequency
242 * those CPUs are running at.
243 */
244
245 return 0;
246 }
247
248 static struct notifier_block init_amu_fie_notifier = {
249 .notifier_call = init_amu_fie_callback,
250 };
251
init_amu_fie(void)252 static int __init init_amu_fie(void)
253 {
254 return cpufreq_register_notifier(&init_amu_fie_notifier,
255 CPUFREQ_POLICY_NOTIFIER);
256 }
257 core_initcall(init_amu_fie);
258
259 #ifdef CONFIG_ACPI_CPPC_LIB
260 #include <acpi/cppc_acpi.h>
261
cpu_read_corecnt(void * val)262 static void cpu_read_corecnt(void *val)
263 {
264 /*
265 * A value of 0 can be returned if the current CPU does not support AMUs
266 * or if the counter is disabled for this CPU. A return value of 0 at
267 * counter read is properly handled as an error case by the users of the
268 * counter.
269 */
270 *(u64 *)val = read_corecnt();
271 }
272
cpu_read_constcnt(void * val)273 static void cpu_read_constcnt(void *val)
274 {
275 /*
276 * Return 0 if the current CPU is affected by erratum 2457168. A value
277 * of 0 is also returned if the current CPU does not support AMUs or if
278 * the counter is disabled. A return value of 0 at counter read is
279 * properly handled as an error case by the users of the counter.
280 */
281 *(u64 *)val = this_cpu_has_cap(ARM64_WORKAROUND_2457168) ?
282 0UL : read_constcnt();
283 }
284
285 static inline
counters_read_on_cpu(int cpu,smp_call_func_t func,u64 * val)286 int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)
287 {
288 /*
289 * Abort call on counterless CPU or when interrupts are
290 * disabled - can lead to deadlock in smp sync call.
291 */
292 if (!cpu_has_amu_feat(cpu))
293 return -EOPNOTSUPP;
294
295 if (WARN_ON_ONCE(irqs_disabled()))
296 return -EPERM;
297
298 smp_call_function_single(cpu, func, val, 1);
299
300 return 0;
301 }
302
303 /*
304 * Refer to drivers/acpi/cppc_acpi.c for the description of the functions
305 * below.
306 */
cpc_ffh_supported(void)307 bool cpc_ffh_supported(void)
308 {
309 int cpu = get_cpu_with_amu_feat();
310
311 /*
312 * FFH is considered supported if there is at least one present CPU that
313 * supports AMUs. Using FFH to read core and reference counters for CPUs
314 * that do not support AMUs, have counters disabled or that are affected
315 * by errata, will result in a return value of 0.
316 *
317 * This is done to allow any enabled and valid counters to be read
318 * through FFH, knowing that potentially returning 0 as counter value is
319 * properly handled by the users of these counters.
320 */
321 if ((cpu >= nr_cpu_ids) || !cpumask_test_cpu(cpu, cpu_present_mask))
322 return false;
323
324 return true;
325 }
326
cpc_read_ffh(int cpu,struct cpc_reg * reg,u64 * val)327 int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
328 {
329 int ret = -EOPNOTSUPP;
330
331 switch ((u64)reg->address) {
332 case 0x0:
333 ret = counters_read_on_cpu(cpu, cpu_read_corecnt, val);
334 break;
335 case 0x1:
336 ret = counters_read_on_cpu(cpu, cpu_read_constcnt, val);
337 break;
338 }
339
340 if (!ret) {
341 *val &= GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
342 reg->bit_offset);
343 *val >>= reg->bit_offset;
344 }
345
346 return ret;
347 }
348
cpc_write_ffh(int cpunum,struct cpc_reg * reg,u64 val)349 int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
350 {
351 return -EOPNOTSUPP;
352 }
353 #endif /* CONFIG_ACPI_CPPC_LIB */
354