1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3 * x86_emulate.h
4 *
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
6 *
7 * Copyright (c) 2005 Keir Fraser
8 *
9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
10 */
11
12 #ifndef _ASM_X86_KVM_X86_EMULATE_H
13 #define _ASM_X86_KVM_X86_EMULATE_H
14
15 #include <asm/desc_defs.h>
16 #include "fpu.h"
17
18 struct x86_emulate_ctxt;
19 enum x86_intercept;
20 enum x86_intercept_stage;
21
22 struct x86_exception {
23 u8 vector;
24 bool error_code_valid;
25 u16 error_code;
26 bool nested_page_fault;
27 u64 address; /* cr2 or nested page fault gpa */
28 u8 async_page_fault;
29 unsigned long exit_qualification;
30 };
31
32 /*
33 * This struct is used to carry enough information from the instruction
34 * decoder to main KVM so that a decision can be made whether the
35 * instruction needs to be intercepted or not.
36 */
37 struct x86_instruction_info {
38 u8 intercept; /* which intercept */
39 u8 rep_prefix; /* rep prefix? */
40 u8 modrm_mod; /* mod part of modrm */
41 u8 modrm_reg; /* index of register used */
42 u8 modrm_rm; /* rm part of modrm */
43 u64 src_val; /* value of source operand */
44 u64 dst_val; /* value of destination operand */
45 u8 src_bytes; /* size of source operand */
46 u8 dst_bytes; /* size of destination operand */
47 u8 ad_bytes; /* size of src/dst address */
48 u64 next_rip; /* rip following the instruction */
49 };
50
51 /*
52 * x86_emulate_ops:
53 *
54 * These operations represent the instruction emulator's interface to memory.
55 * There are two categories of operation: those that act on ordinary memory
56 * regions (*_std), and those that act on memory regions known to require
57 * special treatment or emulation (*_emulated).
58 *
59 * The emulator assumes that an instruction accesses only one 'emulated memory'
60 * location, that this location is the given linear faulting address (cr2), and
61 * that this is one of the instruction's data operands. Instruction fetches and
62 * stack operations are assumed never to access emulated memory. The emulator
63 * automatically deduces which operand of a string-move operation is accessing
64 * emulated memory, and assumes that the other operand accesses normal memory.
65 *
66 * NOTES:
67 * 1. The emulator isn't very smart about emulated vs. standard memory.
68 * 'Emulated memory' access addresses should be checked for sanity.
69 * 'Normal memory' accesses may fault, and the caller must arrange to
70 * detect and handle reentrancy into the emulator via recursive faults.
71 * Accesses may be unaligned and may cross page boundaries.
72 * 2. If the access fails (cannot emulate, or a standard access faults) then
73 * it is up to the memop to propagate the fault to the guest VM via
74 * some out-of-band mechanism, unknown to the emulator. The memop signals
75 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
76 * then immediately bail.
77 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
78 * cmpxchg8b_emulated need support 8-byte accesses.
79 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
80 */
81 /* Access completed successfully: continue emulation as normal. */
82 #define X86EMUL_CONTINUE 0
83 /* Access is unhandleable: bail from emulation and return error to caller. */
84 #define X86EMUL_UNHANDLEABLE 1
85 /* Terminate emulation but return success to the caller. */
86 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
87 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
88 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
89 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
90 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
91
92 /* x86-specific emulation flags */
93 #define X86EMUL_F_WRITE BIT(0)
94 #define X86EMUL_F_FETCH BIT(1)
95 #define X86EMUL_F_IMPLICIT BIT(2)
96 #define X86EMUL_F_INVLPG BIT(3)
97 #define X86EMUL_F_MSR BIT(4)
98 #define X86EMUL_F_DT_LOAD BIT(5)
99
100 struct x86_emulate_ops {
101 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
102 /*
103 * read_gpr: read a general purpose register (rax - r15)
104 *
105 * @reg: gpr number.
106 */
107 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
108 /*
109 * write_gpr: write a general purpose register (rax - r15)
110 *
111 * @reg: gpr number.
112 * @val: value to write.
113 */
114 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
115 /*
116 * read_std: Read bytes of standard (non-emulated/special) memory.
117 * Used for descriptor reading.
118 * @addr: [IN ] Linear address from which to read.
119 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
120 * @bytes: [IN ] Number of bytes to read from memory.
121 * @system:[IN ] Whether the access is forced to be at CPL0.
122 */
123 int (*read_std)(struct x86_emulate_ctxt *ctxt,
124 unsigned long addr, void *val,
125 unsigned int bytes,
126 struct x86_exception *fault, bool system);
127
128 /*
129 * write_std: Write bytes of standard (non-emulated/special) memory.
130 * Used for descriptor writing.
131 * @addr: [IN ] Linear address to which to write.
132 * @val: [OUT] Value write to memory, zero-extended to 'u_long'.
133 * @bytes: [IN ] Number of bytes to write to memory.
134 * @system:[IN ] Whether the access is forced to be at CPL0.
135 */
136 int (*write_std)(struct x86_emulate_ctxt *ctxt,
137 unsigned long addr, void *val, unsigned int bytes,
138 struct x86_exception *fault, bool system);
139 /*
140 * fetch: Read bytes of standard (non-emulated/special) memory.
141 * Used for instruction fetch.
142 * @addr: [IN ] Linear address from which to read.
143 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
144 * @bytes: [IN ] Number of bytes to read from memory.
145 */
146 int (*fetch)(struct x86_emulate_ctxt *ctxt,
147 unsigned long addr, void *val, unsigned int bytes,
148 struct x86_exception *fault);
149
150 /*
151 * read_emulated: Read bytes from emulated/special memory area.
152 * @addr: [IN ] Linear address from which to read.
153 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
154 * @bytes: [IN ] Number of bytes to read from memory.
155 */
156 int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
157 unsigned long addr, void *val, unsigned int bytes,
158 struct x86_exception *fault);
159
160 /*
161 * write_emulated: Write bytes to emulated/special memory area.
162 * @addr: [IN ] Linear address to which to write.
163 * @val: [IN ] Value to write to memory (low-order bytes used as
164 * required).
165 * @bytes: [IN ] Number of bytes to write to memory.
166 */
167 int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
168 unsigned long addr, const void *val,
169 unsigned int bytes,
170 struct x86_exception *fault);
171
172 /*
173 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
174 * emulated/special memory area.
175 * @addr: [IN ] Linear address to access.
176 * @old: [IN ] Value expected to be current at @addr.
177 * @new: [IN ] Value to write to @addr.
178 * @bytes: [IN ] Number of bytes to access using CMPXCHG.
179 */
180 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
181 unsigned long addr,
182 const void *old,
183 const void *new,
184 unsigned int bytes,
185 struct x86_exception *fault);
186 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
187
188 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
189 int size, unsigned short port, void *val,
190 unsigned int count);
191
192 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
193 int size, unsigned short port, const void *val,
194 unsigned int count);
195
196 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
197 struct desc_struct *desc, u32 *base3, int seg);
198 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
199 struct desc_struct *desc, u32 base3, int seg);
200 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
201 int seg);
202 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
203 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
204 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
205 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
206 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
207 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
208 int (*cpl)(struct x86_emulate_ctxt *ctxt);
209 ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr);
210 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
211 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
212 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
213 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
214 int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc);
215 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
216 void (*halt)(struct x86_emulate_ctxt *ctxt);
217 void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
218 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
219 int (*intercept)(struct x86_emulate_ctxt *ctxt,
220 struct x86_instruction_info *info,
221 enum x86_intercept_stage stage);
222
223 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
224 u32 *ecx, u32 *edx, bool exact_only);
225 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
226 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
227 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
228 bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt);
229
230 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
231
232 bool (*is_smm)(struct x86_emulate_ctxt *ctxt);
233 int (*leave_smm)(struct x86_emulate_ctxt *ctxt);
234 void (*triple_fault)(struct x86_emulate_ctxt *ctxt);
235 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
236
237 gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr,
238 unsigned int flags);
239
240 bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr,
241 unsigned int flags);
242 };
243
244 /* Type, address-of, and value of an instruction's operand. */
245 struct operand {
246 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
247 unsigned int bytes;
248 unsigned int count;
249 union {
250 unsigned long orig_val;
251 u64 orig_val64;
252 };
253 union {
254 unsigned long *reg;
255 struct segmented_address {
256 ulong ea;
257 unsigned seg;
258 } mem;
259 unsigned xmm;
260 unsigned mm;
261 } addr;
262 union {
263 unsigned long val;
264 u64 val64;
265 char valptr[sizeof(sse128_t)];
266 sse128_t vec_val;
267 u64 mm_val;
268 void *data;
269 };
270 };
271
272 struct fetch_cache {
273 u8 data[15];
274 u8 *ptr;
275 u8 *end;
276 };
277
278 struct read_cache {
279 u8 data[1024];
280 unsigned long pos;
281 unsigned long end;
282 };
283
284 /* Execution mode, passed to the emulator. */
285 enum x86emul_mode {
286 X86EMUL_MODE_REAL, /* Real mode. */
287 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
288 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
289 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
290 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
291 };
292
293 /*
294 * fastop functions are declared as taking a never-defined fastop parameter,
295 * so they can't be called from C directly.
296 */
297 struct fastop;
298
299 typedef void (*fastop_t)(struct fastop *);
300
301 /*
302 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is
303 * tracked/accessed via _eip, and except for RIP relative addressing, which
304 * also uses _eip, RIP cannot be a register operand nor can it be an operand in
305 * a ModRM or SIB byte.
306 */
307 #ifdef CONFIG_X86_64
308 #define NR_EMULATOR_GPRS 16
309 #else
310 #define NR_EMULATOR_GPRS 8
311 #endif
312
313 struct x86_emulate_ctxt {
314 void *vcpu;
315 const struct x86_emulate_ops *ops;
316
317 /* Register state before/after emulation. */
318 unsigned long eflags;
319 unsigned long eip; /* eip before instruction emulation */
320 /* Emulated execution mode, represented by an X86EMUL_MODE value. */
321 enum x86emul_mode mode;
322
323 /* interruptibility state, as a result of execution of STI or MOV SS */
324 int interruptibility;
325
326 bool perm_ok; /* do not check permissions if true */
327 bool tf; /* TF value before instruction (after for syscall/sysret) */
328
329 bool have_exception;
330 struct x86_exception exception;
331
332 /* GPA available */
333 bool gpa_available;
334 gpa_t gpa_val;
335
336 /*
337 * decode cache
338 */
339
340 /* current opcode length in bytes */
341 u8 opcode_len;
342 u8 b;
343 u8 intercept;
344 u8 op_bytes;
345 u8 ad_bytes;
346 union {
347 int (*execute)(struct x86_emulate_ctxt *ctxt);
348 fastop_t fop;
349 };
350 int (*check_perm)(struct x86_emulate_ctxt *ctxt);
351
352 bool rip_relative;
353 u8 rex_prefix;
354 u8 lock_prefix;
355 u8 rep_prefix;
356 /* bitmaps of registers in _regs[] that can be read */
357 u16 regs_valid;
358 /* bitmaps of registers in _regs[] that have been written */
359 u16 regs_dirty;
360 /* modrm */
361 u8 modrm;
362 u8 modrm_mod;
363 u8 modrm_reg;
364 u8 modrm_rm;
365 u8 modrm_seg;
366 u8 seg_override;
367 u64 d;
368 unsigned long _eip;
369
370 /* Here begins the usercopy section. */
371 struct operand src;
372 struct operand src2;
373 struct operand dst;
374 struct operand memop;
375 unsigned long _regs[NR_EMULATOR_GPRS];
376 struct operand *memopp;
377 struct fetch_cache fetch;
378 struct read_cache io_read;
379 struct read_cache mem_read;
380 bool is_branch;
381 };
382
383 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \
384 ({ \
385 int __ret = (cond); \
386 \
387 if (WARN_ON_ONCE(__ret)) \
388 ctxt->ops->vm_bugged(ctxt); \
389 unlikely(__ret); \
390 })
391
392 /* Repeat String Operation Prefix */
393 #define REPE_PREFIX 0xf3
394 #define REPNE_PREFIX 0xf2
395
396 /* CPUID vendors */
397 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
398 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
399 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
400
401 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
402 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
403 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
404
405 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
406 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
407 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
408
409 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
410 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
411 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
412
413 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
414 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
415 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
416
is_guest_vendor_intel(u32 ebx,u32 ecx,u32 edx)417 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
418 {
419 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
420 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
421 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
422 }
423
is_guest_vendor_amd(u32 ebx,u32 ecx,u32 edx)424 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
425 {
426 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
427 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
428 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
429 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
430 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
431 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
432 }
433
is_guest_vendor_hygon(u32 ebx,u32 ecx,u32 edx)434 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
435 {
436 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
437 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
438 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
439 }
440
441 enum x86_intercept_stage {
442 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
443 X86_ICPT_PRE_EXCEPT,
444 X86_ICPT_POST_EXCEPT,
445 X86_ICPT_POST_MEMACCESS,
446 };
447
448 enum x86_intercept {
449 x86_intercept_none,
450 x86_intercept_cr_read,
451 x86_intercept_cr_write,
452 x86_intercept_clts,
453 x86_intercept_lmsw,
454 x86_intercept_smsw,
455 x86_intercept_dr_read,
456 x86_intercept_dr_write,
457 x86_intercept_lidt,
458 x86_intercept_sidt,
459 x86_intercept_lgdt,
460 x86_intercept_sgdt,
461 x86_intercept_lldt,
462 x86_intercept_sldt,
463 x86_intercept_ltr,
464 x86_intercept_str,
465 x86_intercept_rdtsc,
466 x86_intercept_rdpmc,
467 x86_intercept_pushf,
468 x86_intercept_popf,
469 x86_intercept_cpuid,
470 x86_intercept_rsm,
471 x86_intercept_iret,
472 x86_intercept_intn,
473 x86_intercept_invd,
474 x86_intercept_pause,
475 x86_intercept_hlt,
476 x86_intercept_invlpg,
477 x86_intercept_invlpga,
478 x86_intercept_vmrun,
479 x86_intercept_vmload,
480 x86_intercept_vmsave,
481 x86_intercept_vmmcall,
482 x86_intercept_stgi,
483 x86_intercept_clgi,
484 x86_intercept_skinit,
485 x86_intercept_rdtscp,
486 x86_intercept_rdpid,
487 x86_intercept_icebp,
488 x86_intercept_wbinvd,
489 x86_intercept_monitor,
490 x86_intercept_mwait,
491 x86_intercept_rdmsr,
492 x86_intercept_wrmsr,
493 x86_intercept_in,
494 x86_intercept_ins,
495 x86_intercept_out,
496 x86_intercept_outs,
497 x86_intercept_xsetbv,
498
499 nr_x86_intercepts
500 };
501
502 /* Host execution mode. */
503 #if defined(CONFIG_X86_32)
504 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
505 #elif defined(CONFIG_X86_64)
506 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
507 #endif
508
509 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type);
510 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
511 #define EMULATION_FAILED -1
512 #define EMULATION_OK 0
513 #define EMULATION_RESTART 1
514 #define EMULATION_INTERCEPTED 2
515 void init_decode_cache(struct x86_emulate_ctxt *ctxt);
516 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, bool check_intercepts);
517 int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
518 u16 tss_selector, int idt_index, int reason,
519 bool has_error_code, u32 error_code);
520 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
521 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
522 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
523 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
524
reg_read(struct x86_emulate_ctxt * ctxt,unsigned nr)525 static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr)
526 {
527 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
528 nr &= NR_EMULATOR_GPRS - 1;
529
530 if (!(ctxt->regs_valid & (1 << nr))) {
531 ctxt->regs_valid |= 1 << nr;
532 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr);
533 }
534 return ctxt->_regs[nr];
535 }
536
reg_write(struct x86_emulate_ctxt * ctxt,unsigned nr)537 static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr)
538 {
539 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
540 nr &= NR_EMULATOR_GPRS - 1;
541
542 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
543 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
544
545 ctxt->regs_valid |= 1 << nr;
546 ctxt->regs_dirty |= 1 << nr;
547 return &ctxt->_regs[nr];
548 }
549
reg_rmw(struct x86_emulate_ctxt * ctxt,unsigned nr)550 static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr)
551 {
552 reg_read(ctxt, nr);
553 return reg_write(ctxt, nr);
554 }
555
556 #endif /* _ASM_X86_KVM_X86_EMULATE_H */
557